TOP_DARJEELING_BATCH_SIM Simulation Results (Summary)

Monday September 08 2025 16:06:54 UTC

GitHub Revision: 83a1436

Branch: master

Name Passing Total Pass Rate
TL_AGENT 1 1 100.00
AES/UNMASKED 30 32 93.75
AES/MASKED 30 32 93.75
AON_TIMER 23 23 100.00
CSRNG 19 19 100.00
DMA 24 25 96.00
EDN 21 21 100.00
ENTROPY_SRC/RNG_16BITS 21 22 95.45
HMAC 28 28 100.00
I2C 43 50 86.00
KEYMGR 30 30 100.00
KEYMGR_DPE 14 14 100.00
KMAC/MASKED 40 40 100.00
KMAC/UNMASKED 39 40 97.50
LC_CTRL/VOLATILE_UNLOCK_DISABLED 38 39 97.44
LC_CTRL/VOLATILE_UNLOCK_ENABLED 38 39 97.44
MBX 13 16 81.25
OTBN 22 41 53.66
PRIM_ALERT 5 5 100.00
PRIM_ESC 1 1 100.00
PRIM_LFSR 4 4 100.00
PRIM_PRESENT 1 1 100.00
PRIM_PRINCE 1 1 100.00
ROM_CTRL/32KB 17 19 89.47
ROM_CTRL/64KB 18 19 94.74
RV_DM/USE_DMI_INTERFACE 39 53 73.58
RV_TIMER 19 19 100.00
SPI_HOST 26 26 100.00
SPI_DEVICE/1R1W 31 33 93.94
SRAM_CTRL/MAIN 30 31 96.77
SRAM_CTRL/RET 29 31 93.55
UART 26 27 96.30
AC_RANGE_CHECK 20 20 100.00
ALERT_HANDLER 21 26 80.77
CLKMGR 25 27 92.59
GPIO 27 28 96.43
OTP_CTRL 20 30 66.67
RSTMGR_CNSTY_CHK 1 1 100.00
RSTMGR 19 19 100.00
XBAR_MAIN 17 18 94.44
XBAR_PERI 18 18 100.00
XBAR_DBG 18 18 100.00
XBAR_MBX 18 18 100.00
CHIP 78 250 31.20