TOP_EARLGREY_BATCH_SIM Simulation Results (Summary)

Thursday September 18 2025 18:19:06 UTC

GitHub Revision: bddb67a

Branch: master

Name Passing Total Pass Rate
TL_AGENT 1 1 100.00
ADC_CTRL 22 25 88.00
AES/UNMASKED 0 32 0.00
AES/MASKED 3 32 9.38
AON_TIMER 22 23 95.65
CSRNG 1 19 5.26
EDN 7 21 33.33
ENTROPY_SRC/RNG_4BITS 1 22 4.55
HMAC 26 28 92.86
I2C 37 50 74.00
KEYMGR 27 30 90.00
KMAC/MASKED 38 40 95.00
KMAC/UNMASKED 35 40 87.50
LC_CTRL/VOLATILE_UNLOCK_DISABLED 23 39 58.97
LC_CTRL/VOLATILE_UNLOCK_ENABLED 36 39 92.31
OTBN 1 41 2.44
PATTGEN 2 18 11.11
PRIM_ALERT 4 5 80.00
PRIM_ESC 1 1 100.00
PRIM_LFSR 3 4 75.00
PRIM_PRESENT 1 1 100.00
PRIM_PRINCE 1 1 100.00
ROM_CTRL/32KB 18 19 94.74
ROM_CTRL/64KB 17 19 89.47
RV_DM/USE_JTAG_INTERFACE 38 53 71.70
RV_TIMER 9 19 47.37
SPI_HOST 2 26 7.69
SPI_DEVICE/1R1W 29 33 87.88
SPI_DEVICE/2P 32 33 96.97
SRAM_CTRL/MAIN 30 31 96.77
SRAM_CTRL/RET 28 31 90.32
SYSRST_CTRL 18 27 66.67
UART 0 27 0.00
USBDEV 84 100 84.00
GPIO 25 27 92.59
ALERT_HANDLER 25 26 96.15
CLKMGR 23 27 85.19
FLASH_CTRL 53 78 67.95
OTP_CTRL 26 30 86.67
PWM 1 17 5.88
PWRMGR 12 28 42.86
RSTMGR_CNSTY_CHK 1 1 100.00
RSTMGR 19 19 100.00
XBAR_MAIN 16 18 88.89
XBAR_PERI 16 18 88.89
CHIP 163 325 50.15