TOP_EARLGREY_BATCH_SIM Simulation Results (Summary)

Sunday June 08 2025 00:08:59 UTC

GitHub Revision: 2995ba4

Branch: master

Name Passing Total Pass Rate Coverage
TL_AGENT 50 50 100.00 --
ADC_CTRL 894 920 97.17 97.38
AES/UNMASKED 1529 1602 95.44 97.30
AES/MASKED 1545 1602 96.44 98.38
AON_TIMER 315 315 100.00 99.29
CSRNG 1527 1630 93.68 97.59
EDN 1111 1130 98.32 96.03
ENTROPY_SRC 1690 2570 65.76 96.18
HMAC 821 821 100.00 91.65
I2C 1845 2042 90.35 87.97
KEYMGR 1057 1110 95.23 97.78
KMAC/MASKED 919 940 97.77 95.04
KMAC/UNMASKED 912 940 97.02 93.81
LC_CTRL/VOLATILE_UNLOCK_DISABLED 998 1030 96.89 90.28
LC_CTRL/VOLATILE_UNLOCK_ENABLED 1002 1030 97.28 90.41
OTBN 573 585 97.95 99.10
PATTGEN 454 570 79.65 98.80
PRIM_ALERT 79 80 98.75 95.19
PRIM_ESC 20 20 100.00 92.29
PRIM_LFSR 200 200 100.00 98.31
PRIM_PRESENT 50 50 100.00 93.41
PRIM_PRINCE 500 500 100.00 100.00
ROM_CTRL/32KB 261 266 98.12 99.63
ROM_CTRL/64KB 266 266 100.00 99.56
RV_DM/USE_JTAG_INTERFACE 388 483 80.33 75.54
RV_TIMER 350 350 100.00 96.44
SPI_HOST 837 840 99.64 95.20
SPI_DEVICE/1R1W 1129 1151 98.09 92.80
SPI_DEVICE/2P 1151 1151 100.00 93.34
SRAM_CTRL/MAIN 1162 1190 97.65 96.04
SRAM_CTRL/RET 1165 1190 97.90 95.99
SYSRST_CTRL 913 932 97.96 97.27
UART 1256 1320 95.15 95.00
USBDEV 3905 3965 98.49 97.33
GPIO 970 1020 95.10 96.61
ALERT_HANDLER 667 850 78.47 98.18
CLKMGR 952 960 99.17 97.02
FLASH_CTRL 1014 1281 79.16 95.18
OTP_CTRL 1157 1343 86.15 93.28
PWM 115 276 41.67 99.21
PWRMGR 1064 1070 99.44 98.11
RSTMGR_CNSTY_CHK 10 10 100.00 95.87
RSTMGR 620 620 100.00 99.49
XBAR_MAIN 900 900 100.00 99.17
XBAR_PERI 900 900 100.00 99.12
CHIP 2725 2955 92.22 95.36