Simulation Results

Block	Tests			Coverage Summary				Code Coverage
Block	Pass	Total	%	Overall	Code	Functional	Assertion	Block	Line	Branch	Condition	Toggle	FSM
ADC_CTRL	231	233	99.14	71.35	98.00	19.29	96.76	-	99.05	98.51	95.12	100.00	97.30
AES/MASKED	1014	1110	91.35	97.36	96.56	97.13	98.38	96.89	97.77	92.69	-	97.99	97.78
AES/UNMASKED	974	1110	87.75	96.39	93.15	97.90	98.11	93.86	95.12	87.65	-	97.99	91.85
ALERT_HANDLER	373	593	62.90	96.27	97.51	92.41	98.89	-	99.99	99.97	97.49	90.08	100.00
AON_TIMER	177	180	98.33	99.09	99.17	100.00	98.10	-	99.09	98.56	99.05	100.00	-
CHIP	1689	1945	86.84	91.16	77.39	98.80	97.28	-	94.09	94.61	92.92	72.02	33.33
CLKMGR	265	273	97.07	94.39	98.87	87.82	96.47	-	99.29	99.06	96.02	100.00	100.00
CSRNG	1392	1403	99.22	95.01	96.22	91.87	96.94	98.53	99.58	96.40	-	93.64	95.24
EDN/EDN0	686	688	99.71	95.78	95.55	92.86	98.92	-	98.91	96.51	93.79	97.12	91.40
EDN/EDN1	687	688	99.85	95.52	95.63	92.23	98.70	-	98.48	94.59	94.69	96.08	94.32
ENTROPY_SRC/RNG_4BITS	2378	2453	96.94	91.08	90.73	92.53	89.98	95.21	97.84	88.12	-	79.04	97.92
GPIO	232	253	91.70	97.25	94.91	100.00	96.84	-	99.76	99.80	99.57	80.52	-
HMAC	693	694	99.86	94.97	87.70	99.62	97.60	-	99.64	99.35	96.30	46.17	97.06
I2C	591	755	78.28	88.93	80.53	88.58	97.67	-	97.28	93.83	89.29	74.04	48.21
KEYMGR_DPE/EARLGREY	105	143	73.43	66.01	83.59	16.75	97.69	-	97.64	94.82	90.31	59.49	75.68
KMAC/MASKED	314	540	58.15	82.65	68.01	85.29	94.66	-	97.46	91.48	87.43	23.15	40.51
KMAC/UNMASKED	315	540	58.33	80.56	64.92	83.05	93.72	-	95.93	89.72	86.74	21.54	30.66
LC_CTRL/VOLATILE_UNLOCK_DISABLED	493	523	94.26	92.31	85.67	96.42	94.83	-	97.28	93.90	81.56	88.33	67.29
LC_CTRL/VOLATILE_UNLOCK_ENABLED	494	523	94.46	92.33	85.93	96.24	94.83	-	97.26	94.00	81.83	88.33	68.22
OTBN	420	443	94.81	93.20	82.62	100.00	96.97	97.83	98.05	82.25	-	82.58	67.61
OTP_CTRL	637	903	70.54	90.85	85.40	91.68	95.47	-	90.29	86.80	93.98	92.55	63.37
PRIM_ALERT	60	60	100.00	91.54	97.02	-	86.05	-	100.00	95.83	100.00	100.00	89.29
PRIM_ESC	20	20	100.00	89.45	93.71	-	85.19	-	95.41	88.89	87.80	100.00	96.43
PRIM_LFSR	4	4	100.00	97.07	99.14	-	95.00	-	100.00	100.00	96.55	100.00	-
PRIM_PRESENT	1	1	100.00	89.63	79.26	-	100.00	-	90.41	75.00	75.00	76.63	-
PRIM_PRINCE	10	10	100.00	100.00	100.00	-	100.00	-	100.00	100.00	100.00	100.00	-
PWRMGR	258	273	94.51	98.51	97.57	99.01	98.96	-	99.09	96.38	96.75	99.62	96.00
ROM_CTRL/192KB	149	156	95.51	98.41	98.50	99.04	97.68	-	99.21	99.28	98.66	95.34	100.00
RRAM_CTRL	66	93	70.97	63.21	54.45	55.41	79.77	87.47	89.32	72.72	-	39.07	16.67
RSTMGR	148	148	100.00	98.78	99.66	97.76	98.93	-	99.51	99.83	99.31	100.00	-
RSTMGR_CNSTY_CHK	10	10	100.00	97.81	95.61	-	100.00	-	98.46	98.39	88.89	100.00	92.31
RV_DM/USE_JTAG_INTERFACE	297	368	80.71	79.27	84.11	57.84	95.87	-	95.94	87.91	89.44	70.63	76.62
RV_TIMER	204	223	91.48	97.50	94.66	99.12	98.73	-	100.00	100.00	100.00	78.66	-
SPI_DEVICE/1R1W	395	416	94.95	95.34	91.49	99.01	95.52	-	98.96	98.30	96.55	74.30	89.36
SPI_HOST	219	220	99.55	92.58	91.32	90.76	95.65	97.01	98.76	93.45	-	73.07	100.00
SRAM_CTRL/MAIN	248	248	100.00	96.86	95.88	96.60	98.10	96.36	97.04	94.64	-	91.84	100.00
SRAM_CTRL/RET	248	248	100.00	92.36	82.54	96.60	97.95	94.09	95.21	89.95	-	78.32	66.67
SYSRST_CTRL	399	410	97.32	94.79	98.57	86.85	98.96	-	99.50	99.59	97.63	100.00	96.15
TL_AGENT	10	10	100.00	-	-	-	-	-	-	-	-	-	-
UART	439	453	96.91	96.91	92.64	99.23	98.85	-	99.48	98.14	98.25	74.67	-
USBDEV	1751	1780	98.37	97.48	96.87	98.28	97.29	-	98.78	98.22	95.39	97.03	94.92
XBAR_MAIN	450	450	100.00	99.30	99.17	100.00	98.72	-	100.00	100.00	97.30	99.37	-
XBAR_PERI	450	450	100.00	99.45	99.16	100.00	99.20	-	100.00	100.00	96.64	100.00	-

Simulation Results: top_earlgrey_batch_sim