TOP_EARLGREY_BATCH_SIM Simulation Results (Summary)

Thursday August 28 2025 14:12:23 UTC

GitHub Revision: 05d0058

Branch: master

Name Passing Total Pass Rate
TL_AGENT 1 1 100.00
ADC_CTRL 0 25 0.00
AES/UNMASKED 11 32 34.38
AES/MASKED 11 32 34.38
AON_TIMER 0 23 0.00
CSRNG 19 19 100.00
EDN 21 21 100.00
ENTROPY_SRC/RNG_4BITS 0 22 0.00
HMAC 0 28 0.00
I2C 0 50 0.00
KEYMGR 0 30 0.00
KMAC/MASKED 0 40 0.00
KMAC/UNMASKED 0 40 0.00
LC_CTRL/VOLATILE_UNLOCK_DISABLED 0 39 0.00
LC_CTRL/VOLATILE_UNLOCK_ENABLED 0 39 0.00
OTBN 0 41 0.00
PATTGEN 0 18 0.00
PRIM_ALERT 5 5 100.00
PRIM_ESC 1 1 100.00
PRIM_LFSR 4 4 100.00
PRIM_PRESENT 1 1 100.00
PRIM_PRINCE 1 1 100.00
ROM_CTRL/32KB 0 19 0.00
ROM_CTRL/64KB 0 19 0.00
RV_DM/USE_JTAG_INTERFACE 0 53 0.00
RV_TIMER 0 19 0.00
SPI_HOST 0 26 0.00
SPI_DEVICE/1R1W 0 33 0.00
SPI_DEVICE/2P 0 33 0.00
SRAM_CTRL/MAIN 0 31 0.00
SRAM_CTRL/RET 0 31 0.00
SYSRST_CTRL 0 27 0.00
UART 0 27 0.00
USBDEV 0 100 0.00
GPIO 0 27 0.00
ALERT_HANDLER 0 26 0.00
CLKMGR 0 27 0.00
FLASH_CTRL 0 78 0.00
OTP_CTRL 0 30 0.00
PWM 0 17 0.00
PWRMGR 0 28 0.00
RSTMGR_CNSTY_CHK 0 1 0.00
RSTMGR 0 19 0.00
XBAR_MAIN 18 18 100.00
XBAR_PERI 18 18 100.00
CHIP 160 325 49.23