TOP_EARLGREY_BATCH_SIM Simulation Results (Summary)

Sunday April 20 2025 00:13:53 UTC

GitHub Revision: 97d23b4

Branch: master

Name Passing Total Pass Rate Coverage
TL_AGENT 50 50 100.00 --
ADC_CTRL 903 920 98.15 97.67
AES/UNMASKED 1541 1602 96.19 97.41
AES/MASKED 1569 1602 97.94 98.45
AON_TIMER 315 315 100.00 100.00
CSRNG 1615 1630 99.08 97.74
EDN 1110 1130 98.23 95.64
ENTROPY_SRC 1699 2570 66.11 96.18
HMAC 821 821 100.00 92.06
I2C 1855 2042 90.84 88.05
KEYMGR 1053 1110 94.86 97.83
KMAC/MASKED 923 940 98.19 95.43
KMAC/UNMASKED 913 940 97.13 93.65
LC_CTRL/VOLATILE_UNLOCK_DISABLED 1004 1030 97.48 90.07
LC_CTRL/VOLATILE_UNLOCK_ENABLED 994 1030 96.50 90.28
OTBN 568 585 97.09 99.04
PATTGEN 475 570 83.33 98.88
PRIM_ALERT 80 80 100.00 95.19
PRIM_ESC 20 20 100.00 92.29
PRIM_LFSR 200 200 100.00 98.31
PRIM_PRESENT 50 50 100.00 93.41
PRIM_PRINCE 500 500 100.00 100.00
ROM_CTRL/32KB 262 266 98.50 99.60
ROM_CTRL/64KB 266 266 100.00 99.60
RV_DM/USE_JTAG_INTERFACE 388 483 80.33 76.29
RV_TIMER 583 620 94.03 98.17
SPI_HOST 827 840 98.45 96.26
SPI_DEVICE/1R1W 1129 1151 98.09 94.45
SPI_DEVICE/2P 1150 1151 99.91 94.46
SRAM_CTRL/MAIN 1164 1190 97.82 96.07
SRAM_CTRL/RET 1165 1190 97.90 96.04
SYSRST_CTRL 905 932 97.10 96.63
UART 1319 1320 99.92 97.79
USBDEV 3905 3965 98.49 97.63
GPIO 970 1020 95.10 98.85
ALERT_HANDLER 665 850 78.24 98.98
CLKMGR 955 960 99.48 96.97
FLASH_CTRL 1004 1281 78.38 95.08
OTP_CTRL 1168 1343 86.97 94.23
PWM 115 276 41.67 99.23
PWRMGR 1066 1070 99.63 98.03
RSTMGR_CNSTY_CHK 10 10 100.00 95.87
RSTMGR 620 620 100.00 99.49
XBAR_MAIN 900 900 100.00 99.17
XBAR_PERI 900 900 100.00 99.11
CHIP 2754 2955 93.20 95.47