TOP_EARLGREY_BATCH_SIM Simulation Results (Summary)

Sunday April 27 2025 00:14:02 UTC

GitHub Revision: 46e7cd6

Branch: master

Name Passing Total Pass Rate Coverage
TL_AGENT 50 50 100.00 --
ADC_CTRL 897 920 97.50 97.69
AES/UNMASKED 1540 1602 96.13 97.30
AES/MASKED 1561 1602 97.44 98.42
AON_TIMER 315 315 100.00 100.00
CSRNG 1619 1630 99.33 97.79
EDN 1103 1130 97.61 95.79
ENTROPY_SRC 1691 2570 65.80 96.01
HMAC 821 821 100.00 91.96
I2C 1854 2042 90.79 87.98
KEYMGR 1052 1110 94.77 97.76
KMAC/MASKED 917 940 97.55 95.16
KMAC/UNMASKED 904 940 96.17 93.74
LC_CTRL/VOLATILE_UNLOCK_DISABLED 997 1030 96.80 90.17
LC_CTRL/VOLATILE_UNLOCK_ENABLED 997 1030 96.80 90.22
OTBN 571 585 97.61 99.12
PATTGEN 459 570 80.53 98.88
PRIM_ALERT 78 80 97.50 94.85
PRIM_ESC 20 20 100.00 92.29
PRIM_LFSR 200 200 100.00 98.31
PRIM_PRESENT 50 50 100.00 93.41
PRIM_PRINCE 500 500 100.00 100.00
ROM_CTRL/32KB 247 266 92.86 98.60
ROM_CTRL/64KB 251 266 94.36 98.65
RV_DM/USE_JTAG_INTERFACE 388 483 80.33 75.76
RV_TIMER 619 620 99.84 92.14
SPI_HOST 828 840 98.57 96.27
SPI_DEVICE/1R1W 1128 1151 98.00 94.44
SPI_DEVICE/2P 1150 1151 99.91 94.47
SRAM_CTRL/MAIN 1162 1190 97.65 96.09
SRAM_CTRL/RET 1171 1190 98.40 96.04
SYSRST_CTRL 920 932 98.71 97.90
UART 1316 1320 99.70 97.78
USBDEV 3905 3965 98.49 97.58
GPIO 970 1020 95.10 98.85
ALERT_HANDLER 661 850 77.76 98.23
CLKMGR 955 960 99.48 96.94
FLASH_CTRL 1001 1281 78.14 95.04
OTP_CTRL 1168 1343 86.97 94.13
PWM 115 276 41.67 99.23
PWRMGR 1062 1070 99.25 98.01
RSTMGR_CNSTY_CHK 10 10 100.00 95.87
RSTMGR 620 620 100.00 99.49
XBAR_MAIN 900 900 100.00 99.16
XBAR_PERI 900 900 100.00 99.14
CHIP 2762 2955 93.47 95.28