TOP_EARLGREY_BATCH_SIM Simulation Results (Summary)

Sunday September 28 2025 00:12:59 UTC

GitHub Revision: c5877ed

Branch: master

Name Passing Total Pass Rate Coverage
TL_AGENT 50 50 100.00 --
ADC_CTRL 893 920 97.07 97.26
AES/UNMASKED 1548 1602 96.63 97.21
AES/MASKED 1560 1602 97.38 98.38
AON_TIMER 315 315 100.00 98.89
CSRNG 1582 1630 97.06 97.69
EDN 1108 1130 98.05 95.71
ENTROPY_SRC/RNG_4BITS 2551 2570 99.26 94.17
HMAC 821 821 100.00 99.18
I2C 1797 2042 88.00 83.92
KEYMGR 1083 1110 97.57 97.63
KMAC/MASKED 939 940 99.89 95.03
KMAC/UNMASKED 927 940 98.62 93.44
LC_CTRL/VOLATILE_UNLOCK_DISABLED 991 1030 96.21 90.08
LC_CTRL/VOLATILE_UNLOCK_ENABLED 997 1030 96.80 90.22
OTBN 290 585 49.57 93.59
PATTGEN 461 570 80.88 98.53
PRIM_ALERT 96 100 96.00 95.19
PRIM_ESC 20 20 100.00 92.29
PRIM_LFSR 200 200 100.00 98.31
PRIM_PRESENT 50 50 100.00 93.41
PRIM_PRINCE 500 500 100.00 100.00
ROM_CTRL/32KB 259 266 97.37 99.00
ROM_CTRL/64KB 263 266 98.87 99.14
RV_DM/USE_JTAG_INTERFACE 342 483 70.81 81.74
RV_TIMER 309 350 88.29 95.72
SPI_HOST 840 840 100.00 95.09
SPI_DEVICE/1R1W 1130 1151 98.18 92.62
SPI_DEVICE/2P 1151 1151 100.00 93.16
SRAM_CTRL/MAIN 1168 1190 98.15 95.66
SRAM_CTRL/RET 1173 1190 98.57 95.64
SYSRST_CTRL 911 932 97.75 97.43
UART 1256 1320 95.15 94.53
USBDEV 3909 3970 98.46 97.07
GPIO 970 1020 95.10 96.08
ALERT_HANDLER 777 850 91.41 98.84
CLKMGR 955 960 99.48 97.05
FLASH_CTRL 1000 1281 78.06 96.11
OTP_CTRL 1155 1343 86.00 87.80
PWM 115 276 41.67 99.11
PWRMGR 496 1070 46.36 95.36
RSTMGR_CNSTY_CHK 8 10 80.00 95.87
RSTMGR 620 620 100.00 99.27
XBAR_MAIN 900 900 100.00 99.03
XBAR_PERI 900 900 100.00 98.98
CHIP 2753 2956 93.13 89.56