Simulation Results: top_darjeeling_batch_sim

 
18/03/2026 16:32:16 DVSim: v1.16.0 sha: 1b83ebf json Branch: master
Block Tests Coverage Summary Code Coverage
Pass Total % Overall Code Functional Assertion Block Line Branch Condition Toggle FSM
AC_RANGE_CHECK
0 33 0.00 - - - - - - - - - -
AES/MASKED
1 118 0.85 - - - - - - - - - -
AES/UNMASKED
1 118 0.85 - - - - - - - - - -
ALERT_HANDLER
41 60 68.33 85.77 90.83 76.82 89.65 - 99.63 99.64 93.31 88.99 72.58
AON_TIMER
30 34 88.24 - - - - - - - - - -
CHIP
0 328 0.00 - - - - - - - - - -
CLKMGR
28 46 60.87 - - - - - - - - - -
CSRNG
0 68 0.00 - - - - - - - - - -
DMA
6 40 15.00 - - - - - - - - - -
EDN/EDN0
41 42 97.62 - - - - - - - - - -
EDN/EDN1
0 42 0.00 - - - - - - - - - -
ENTROPY_SRC/RNG_16BITS
0 56 0.00 - - - - - - - - - -
GPIO
17 39 43.59 87.18 68.06 99.50 93.99 - 86.59 77.48 73.31 93.52 9.38
HMAC
0 71 0.00 - - - - - - - - - -
I2C
29 64 45.31 - - - - - - - - - -
KEYMGR
66 72 91.67 - - - - - - - - - -
KEYMGR_DPE
20 29 68.97 50.27 44.65 9.48 96.68 - 54.66 63.23 61.76 43.58 0.00
KMAC/MASKED
53 65 81.54 - - - - - - - - - -
KMAC/UNMASKED
26 65 40.00 82.41 86.64 64.94 95.65 - 96.12 93.59 86.78 99.71 57.02
LC_CTRL/VOLATILE_UNLOCK_DISABLED
59 77 76.62 - - - - - - - - - -
LC_CTRL/VOLATILE_UNLOCK_ENABLED
70 77 90.91 88.66 81.67 88.31 95.99 - 97.66 96.01 78.04 87.55 49.09
MBX
4 26 15.38 - - - - - - - - - -
OTBN
0 93 0.00 - - - - - - - - - -
OTP_CTRL
21 94 22.34 - - - - - - - - - -
PRIM_ALERT
15 21 71.43 89.84 93.63 - 86.05 - 100.00 95.83 93.75 100.00 78.57
PRIM_ESC
6 6 100.00 - - - - - - - - - -
PRIM_LFSR
4 4 100.00 - - - - - - - - - -
PRIM_PRESENT
0 1 0.00 - - - - - - - - - -
PRIM_PRINCE
1 1 100.00 - - - - - - - - - -
ROM_CTRL/32KB
32 49 65.31 90.96 96.95 80.43 95.49 - 99.32 98.18 94.35 99.59 93.33
ROM_CTRL/64KB
0 49 0.00 - - - - - - - - - -
RSTMGR
19 38 50.00 - - - - - - - - - -
RSTMGR_CNSTY_CHK
0 1 0.00 - - - - - - - - - -
RV_DM/USE_DMI_INTERFACE
24 73 32.88 - - - - - - - - - -
RV_TIMER
13 31 41.94 - - - - - - - - - -
SPI_DEVICE/1R1W
0 66 0.00 - - - - - - - - - -
SPI_HOST
1 44 2.27 - - - - - - - - - -
SRAM_CTRL/MAIN
29 60 48.33 - - - - - - - - - -
SRAM_CTRL/RET
16 60 26.67 60.44 26.04 60.85 94.44 - 26.39 28.28 32.19 43.32 0.00
TL_AGENT
0 1 0.00 - - - - - - - - - -
UART
19 46 41.30 57.81 69.65 7.05 96.74 - 64.86 63.87 61.73 88.13 -
XBAR_DBG
16 19 84.21 98.40 98.78 97.82 98.59 - 100.00 100.00 95.12 100.00 -
XBAR_MAIN
0 19 0.00 - - - - - - - - - -
XBAR_MBX
16 19 84.21 84.81 97.66 58.74 98.03 - 100.00 100.00 90.65 100.00 -
XBAR_PERI
15 19 78.95 - - - - - - - - - -