TOP_EARLGREY_BATCH_SIM Simulation Results (Summary)

Sunday May 18 2025 00:08:29 UTC

GitHub Revision: 54711bc

Branch: master

Name	Passing	Total	Pass Rate	Coverage
TL_AGENT	50	50	100.00	--
ADC_CTRL	894	920	97.17	97.59
AES/UNMASKED	1544	1602	96.38	97.32
AES/MASKED	1562	1602	97.50	98.42
AON_TIMER	315	315	100.00	100.00
CSRNG	1620	1630	99.39	97.73
EDN	1106	1130	97.88	95.90
ENTROPY_SRC	1691	2570	65.80	95.95
HMAC	821	821	100.00	91.96
I2C	1842	2042	90.21	87.85
KEYMGR	1056	1110	95.14	97.50
KMAC/MASKED	925	940	98.40	95.34
KMAC/UNMASKED	912	940	97.02	94.07
LC_CTRL/VOLATILE_UNLOCK_DISABLED	994	1030	96.50	90.33
LC_CTRL/VOLATILE_UNLOCK_ENABLED	1001	1030	97.18	90.35
OTBN	566	585	96.75	99.06
PATTGEN	445	570	78.07	98.80
PRIM_ALERT	78	80	97.50	94.60
PRIM_ESC	20	20	100.00	89.90
PRIM_LFSR	200	200	100.00	98.31
PRIM_PRESENT	50	50	100.00	93.41
PRIM_PRINCE	500	500	100.00	100.00
ROM_CTRL/32KB	262	266	98.50	99.67
ROM_CTRL/64KB	266	266	100.00	99.67
RV_DM/USE_JTAG_INTERFACE	381	483	78.88	75.64
RV_TIMER	350	350	100.00	100.00
SPI_HOST	838	840	99.76	96.29
SPI_DEVICE/1R1W	1128	1151	98.00	94.54
SPI_DEVICE/2P	1151	1151	100.00	95.17
SRAM_CTRL/MAIN	1162	1190	97.65	96.06
SRAM_CTRL/RET	1163	1190	97.73	96.04
SYSRST_CTRL	902	932	96.78	95.38
UART	1318	1320	99.85	97.77
USBDEV	3903	3965	98.44	97.36
GPIO	970	1020	95.10	98.85
ALERT_HANDLER	675	850	79.41	98.98
CLKMGR	952	960	99.17	96.69
FLASH_CTRL	994	1281	77.60	95.17
OTP_CTRL	1159	1343	86.30	93.27
PWM	115	276	41.67	99.21
PWRMGR	1062	1070	99.25	98.02
RSTMGR_CNSTY_CHK	10	10	100.00	95.87
RSTMGR	620	620	100.00	99.49
XBAR_MAIN	900	900	100.00	99.19
XBAR_PERI	900	900	100.00	99.11
CHIP	2756	2955	93.27	95.49