Simulation Results

Block	Tests			Coverage Summary				Code Coverage
Block	Pass	Total	%	Overall	Code	Functional	Assertion	Block	Line	Branch	Condition	Toggle	FSM
ADC_CTRL	233	233	100.00	71.43	98.00	19.36	96.92	-	99.05	98.51	95.12	100.00	97.30
AES/MASKED	1006	1110	90.63	97.43	96.59	97.32	98.38	96.91	97.77	92.75	-	98.08	97.78
AES/UNMASKED	1004	1110	90.45	96.00	93.15	96.75	98.11	93.84	95.11	87.65	-	97.99	91.85
ALERT_HANDLER	522	593	88.03	98.92	98.91	98.96	98.89	-	99.99	99.99	97.47	97.09	100.00
AON_TIMER	180	180	100.00	99.00	99.17	99.74	98.10	-	99.09	98.56	99.05	100.00	-
CHIP	1672	1945	85.96	91.15	77.28	98.82	97.34	-	93.98	94.34	92.69	72.04	33.33
CLKMGR	243	273	89.01	93.88	98.57	87.31	95.76	-	99.07	98.75	95.85	99.19	100.00
CSRNG	1392	1403	99.22	94.87	96.24	91.21	97.16	98.59	99.54	96.55	-	93.64	95.24
EDN/EDN0	687	688	99.85	95.70	95.55	92.86	98.70	-	98.91	96.51	93.79	97.12	91.40
EDN/EDN1	686	688	99.71	95.24	96.15	92.44	97.14	-	98.48	94.59	94.92	96.15	96.59
ENTROPY_SRC/RNG_4BITS	2330	2453	94.99	91.01	90.77	92.60	89.66	95.21	97.84	88.12	-	79.19	97.92
GPIO	234	253	92.49	97.67	94.91	100.00	98.10	-	99.76	99.80	99.57	80.52	-
HMAC	694	694	100.00	95.19	88.29	99.68	97.60	-	99.64	99.35	96.30	46.17	100.00
I2C	569	755	75.36	88.93	80.55	88.79	97.46	-	97.31	93.97	89.21	74.04	48.21
KEYMGR_DPE/EARLGREY	106	143	74.13	65.99	83.55	16.75	97.67	-	97.64	94.82	90.14	59.49	75.68
KMAC/MASKED	310	540	57.41	82.22	67.14	85.01	94.51	-	97.37	90.93	86.93	23.15	37.34
KMAC/UNMASKED	315	540	58.33	80.82	64.96	83.05	94.45	-	96.02	89.80	86.77	21.54	30.66
LC_CTRL/VOLATILE_UNLOCK_DISABLED	516	523	98.66	92.21	85.73	96.06	94.83	-	97.28	94.05	81.70	88.33	67.29
LC_CTRL/VOLATILE_UNLOCK_ENABLED	514	523	98.28	92.36	86.16	96.24	94.69	-	97.26	94.00	82.04	88.33	69.16
OTBN	420	436	96.33	94.67	87.06	100.00	96.96	99.32	99.52	95.03	-	86.09	67.61
OTP_CTRL	784	903	86.82	91.18	85.53	92.48	95.53	-	90.38	86.94	94.06	92.90	63.37
PRIM_ALERT	54	60	90.00	91.33	96.61	-	86.05	-	100.00	95.83	97.92	100.00	89.29
PRIM_ESC	20	20	100.00	89.45	93.71	-	85.19	-	95.41	88.89	87.80	100.00	96.43
PRIM_LFSR	4	4	100.00	97.07	99.14	-	95.00	-	100.00	100.00	96.55	100.00	-
PRIM_PRESENT	1	1	100.00	89.63	79.26	-	100.00	-	90.41	75.00	75.00	76.63	-
PRIM_PRINCE	10	10	100.00	100.00	100.00	-	100.00	-	100.00	100.00	100.00	100.00	-
PWRMGR	211	273	77.29	96.94	95.01	98.68	97.13	-	99.09	96.19	95.76	90.02	94.00
ROM_CTRL/192KB	154	156	98.72	98.05	97.19	99.28	97.68	-	99.21	99.28	98.81	95.34	93.33
RSTMGR	148	148	100.00	99.12	99.66	98.76	98.93	-	99.51	99.83	99.31	100.00	-
RSTMGR_CNSTY_CHK	10	10	100.00	97.81	95.61	-	100.00	-	98.46	98.39	88.89	100.00	92.31
RV_DM/USE_JTAG_INTERFACE	330	368	89.67	77.66	87.95	49.00	96.03	-	96.20	89.74	90.00	71.58	92.21
RV_TIMER	207	223	92.83	97.69	94.66	100.00	98.41	-	100.00	100.00	100.00	78.66	-
SPI_DEVICE/1R1W	394	416	94.71	95.22	91.49	98.76	95.40	-	98.95	98.29	96.53	74.30	89.36
SPI_HOST	218	220	99.09	92.88	91.30	90.76	96.60	96.96	98.76	93.35	-	73.07	100.00
SRAM_CTRL/MAIN	232	248	93.55	96.59	95.09	96.60	98.10	94.48	95.64	92.86	-	91.84	100.00
SRAM_CTRL/RET	232	248	93.55	92.14	81.75	96.60	98.08	92.19	93.78	88.23	-	78.32	66.67
SYSRST_CTRL	402	410	98.05	93.53	97.99	84.03	98.58	-	99.24	99.22	97.88	100.00	93.59
TL_AGENT	10	10	100.00	-	-	-	-	-	-	-	-	-	-
UART	437	453	96.47	96.73	92.64	99.28	98.27	-	99.48	98.14	98.25	74.67	-
USBDEV	1755	1780	98.60	97.64	96.89	98.73	97.29	-	98.80	98.26	95.46	97.03	94.92
XBAR_MAIN	450	450	100.00	99.36	99.16	100.00	98.92	-	100.00	100.00	97.26	99.37	-
XBAR_PERI	450	450	100.00	99.59	99.16	100.00	99.62	-	100.00	100.00	96.64	100.00	-

Simulation Results: top_earlgrey_batch_sim