Simulation Results: top_earlgrey_batch_sim

 
10/08/2026 15:30:36 DVSim: v1.50.1 sha: af43bb2 JSON Branch: master
Block Tests Coverage Summary Code Coverage
Pass Total % Overall Code Functional Assertion Block Line Branch Condition Toggle FSM
ADC_CTRL
25 25 100.00 70.64 96.81 18.51 96.60 - 99.02 98.45 94.71 100.00 91.89
AES/MASKED
29 32 90.62 88.98 94.33 74.38 98.23 95.29 96.31 89.71 - 97.99 93.33
AES/UNMASKED
29 32 90.62 87.53 89.52 75.33 97.73 90.01 92.39 81.03 - 97.99 86.67
ALERT_HANDLER
25 26 96.15 91.50 92.60 83.63 98.27 - 99.68 98.79 93.44 90.46 80.65
AON_TIMER
23 23 100.00 96.97 99.12 93.70 98.10 - 99.09 98.56 98.81 100.00 -
CHIP
285 328 86.89 73.15 81.65 40.43 97.37 - 94.44 93.82 89.17 73.68 57.14
CLKMGR
25 27 92.59 92.54 97.78 85.76 94.07 - 98.88 98.53 92.28 99.19 100.00
CSRNG
18 19 94.74 88.55 92.22 78.90 94.54 96.99 97.76 92.51 - 92.90 85.71
EDN/EDN0
21 21 100.00 87.18 83.40 80.75 97.40 - 97.61 92.19 87.46 86.52 53.23
EDN/EDN1
20 21 95.24 85.42 79.50 79.62 97.14 - 96.97 90.26 86.62 87.29 36.36
ENTROPY_SRC/RNG_4BITS
21 23 91.30 75.33 89.03 52.23 84.73 94.47 97.21 86.75 - 76.33 95.83
FLASH_CTRL
78 79 98.73 95.62 93.94 95.91 97.02 - 95.95 97.16 94.02 96.17 86.39
GPIO
25 27 92.59 97.56 93.94 100.00 98.73 - 99.76 99.80 97.98 78.21 -
HMAC
28 28 100.00 79.77 97.85 44.07 97.38 - 99.69 99.17 96.29 100.00 94.12
I2C
42 50 84.00 85.60 78.69 80.66 97.46 - 96.69 92.48 85.19 73.87 45.24
KEYMGR
30 30 100.00 86.32 95.00 66.47 97.49 - 98.80 97.99 92.96 96.90 88.37
KMAC/MASKED
29 40 72.50 79.36 66.07 77.65 94.37 - 96.90 90.10 82.94 23.06 37.34
KMAC/UNMASKED
28 40 70.00 78.24 63.64 76.78 94.31 - 95.18 87.82 83.07 21.49 30.66
LC_CTRL/VOLATILE_UNLOCK_DISABLED
39 39 100.00 90.78 84.11 93.55 94.69 - 97.24 93.70 79.29 87.68 62.62
LC_CTRL/VOLATILE_UNLOCK_ENABLED
39 39 100.00 90.43 83.62 92.83 94.83 - 97.17 93.52 79.34 86.40 61.68
OTBN
38 42 90.48 91.43 86.19 98.31 89.80 99.26 99.47 94.56 - 84.51 66.20
OTP_CTRL
29 30 96.67 82.71 79.15 74.22 94.76 - 88.58 84.25 92.62 85.50 44.79
PRIM_ALERT
4 5 80.00 89.84 93.63 - 86.05 - 100.00 95.83 93.75 100.00 78.57
PRIM_ESC
1 1 100.00 85.60 86.01 - 85.19 - 90.83 80.00 87.80 100.00 71.43
PRIM_LFSR
4 4 100.00 97.07 99.14 - 95.00 - 100.00 100.00 96.55 100.00 -
PRIM_PRESENT
1 1 100.00 95.88 91.76 - 100.00 - 90.41 100.00 100.00 76.63 -
PRIM_PRINCE
1 1 100.00 100.00 100.00 - 100.00 - 100.00 100.00 100.00 100.00 -
PWRMGR
29 29 100.00 96.68 95.62 97.03 97.39 - 99.09 96.37 95.47 91.15 96.00
ROM_CTRL/32KB
17 19 89.47 93.92 88.10 96.14 97.53 - 98.53 98.54 95.84 94.24 53.33
ROM_CTRL/64KB
17 19 89.47 94.20 89.81 96.14 96.66 - 98.66 98.91 96.14 95.34 60.00
RSTMGR
19 19 100.00 98.60 99.39 97.76 98.66 - 99.51 99.83 98.96 99.25 -
RSTMGR_CNSTY_CHK
1 1 100.00 97.52 95.05 - 100.00 - 98.41 98.31 86.21 100.00 92.31
RV_DM/USE_JTAG_INTERFACE
52 53 98.11 78.54 85.35 54.73 95.55 - 95.36 89.00 88.61 70.64 83.12
RV_TIMER
16 19 84.21 93.25 94.56 86.47 98.73 - 100.00 100.00 100.00 78.25 -
SPI_DEVICE/1R1W
31 33 93.94 86.22 91.33 72.07 95.27 - 98.86 98.18 95.95 74.30 89.36
SPI_HOST
26 26 100.00 91.55 91.30 88.66 94.71 96.96 98.76 93.35 - 73.07 100.00
SRAM_CTRL/MAIN
31 31 100.00 95.55 94.63 94.20 97.82 94.68 95.12 91.56 - 91.84 100.00
SRAM_CTRL/RET
31 31 100.00 91.51 82.12 94.60 97.81 93.47 94.53 89.01 - 78.28 66.67
SYSRST_CTRL
27 27 100.00 83.00 92.76 61.90 94.35 - 97.26 97.48 94.72 100.00 74.36
TL_AGENT
1 1 100.00 - - - - - - - - - -
UART
26 27 96.30 83.00 91.65 58.49 98.85 - 99.17 97.44 95.33 74.67 -
USBDEV
98 100 98.00 88.08 94.14 72.80 97.29 - 98.66 98.13 94.17 96.71 83.05
XBAR_MAIN
18 18 100.00 86.15 99.04 61.42 97.99 - 100.00 100.00 96.48 99.69 -
XBAR_PERI
18 18 100.00 76.69 99.13 32.75 98.18 - 100.00 100.00 96.51 100.00 -