TOP_EARLGREY_BATCH_SIM Simulation Results (Summary)

Sunday June 01 2025 00:07:48 UTC

GitHub Revision: a4c7f98

Branch: master

Name	Passing	Total	Pass Rate	Coverage
TL_AGENT	50	50	100.00	--
ADC_CTRL	896	920	97.39	97.40
AES/UNMASKED	1547	1602	96.57	97.28
AES/MASKED	1553	1602	96.94	98.41
AON_TIMER	315	315	100.00	99.29
CSRNG	1617	1630	99.20	97.67
EDN	1111	1130	98.32	95.92
ENTROPY_SRC	1685	2570	65.56	95.89
HMAC	821	821	100.00	91.96
I2C	1855	2042	90.84	88.00
KEYMGR	1053	1110	94.86	97.83
KMAC/MASKED	917	940	97.55	95.44
KMAC/UNMASKED	902	940	95.96	93.69
LC_CTRL/VOLATILE_UNLOCK_DISABLED	1001	1030	97.18	90.19
LC_CTRL/VOLATILE_UNLOCK_ENABLED	1002	1030	97.28	90.32
OTBN	564	585	96.41	99.12
PATTGEN	454	570	79.65	98.80
PRIM_ALERT	80	80	100.00	95.19
PRIM_ESC	20	20	100.00	92.29
PRIM_LFSR	200	200	100.00	98.31
PRIM_PRESENT	50	50	100.00	93.41
PRIM_PRINCE	500	500	100.00	100.00
ROM_CTRL/32KB	265	266	99.62	99.67
ROM_CTRL/64KB	266	266	100.00	99.67
RV_DM/USE_JTAG_INTERFACE	391	483	80.95	75.96
RV_TIMER	350	350	100.00	100.00
SPI_HOST	837	840	99.64	96.27
SPI_DEVICE/1R1W	1129	1151	98.09	94.56
SPI_DEVICE/2P	1151	1151	100.00	95.19
SRAM_CTRL/MAIN	1169	1190	98.24	96.04
SRAM_CTRL/RET	1167	1190	98.07	96.04
SYSRST_CTRL	912	932	97.85	97.10
UART	1315	1320	99.62	97.83
USBDEV	3903	3965	98.44	97.62
GPIO	970	1020	95.10	98.85
ALERT_HANDLER	652	850	76.71	98.89
CLKMGR	952	960	99.17	96.74
FLASH_CTRL	1004	1281	78.38	95.03
OTP_CTRL	1158	1343	86.22	93.25
PWM	115	276	41.67	99.21
PWRMGR	1067	1070	99.72	98.11
RSTMGR_CNSTY_CHK	10	10	100.00	95.87
RSTMGR	620	620	100.00	99.49
XBAR_MAIN	900	900	100.00	99.16
XBAR_PERI	900	900	100.00	99.17
CHIP	2757	2955	93.30	95.53