TOP_EARLGREY_BATCH_SIM Simulation Results (Summary)

Sunday October 12 2025 00:08:33 UTC

GitHub Revision: f01486e

Branch: master

Name Passing Total Pass Rate Coverage
TL_AGENT 50 50 100.00 --
ADC_CTRL 883 920 95.98 97.32
AES/UNMASKED 1521 1602 94.94 97.21
AES/MASKED 1564 1602 97.63 98.38
AON_TIMER 315 315 100.00 98.89
CSRNG 1618 1630 99.26 97.59
EDN 1110 1130 98.23 94.83
ENTROPY_SRC/RNG_4BITS 2549 2570 99.18 94.08
HMAC 821 821 100.00 99.19
I2C 1797 2042 88.00 83.90
KEYMGR 1080 1110 97.30 97.66
KMAC/MASKED 937 940 99.68 95.41
KMAC/UNMASKED 925 940 98.40 93.57
LC_CTRL/VOLATILE_UNLOCK_DISABLED 1001 1030 97.18 90.12
LC_CTRL/VOLATILE_UNLOCK_ENABLED 995 1030 96.60 89.97
OTBN 291 585 49.74 93.66
PATTGEN 463 570 81.23 98.53
PRIM_ALERT 95 100 95.00 95.19
PRIM_ESC 20 20 100.00 92.29
PRIM_LFSR 200 200 100.00 98.31
PRIM_PRESENT 50 50 100.00 93.41
PRIM_PRINCE 500 500 100.00 100.00
ROM_CTRL/32KB 261 266 98.12 99.24
ROM_CTRL/64KB 265 266 99.62 99.14
RV_DM/USE_JTAG_INTERFACE 342 483 70.81 81.59
RV_TIMER 307 350 87.71 95.81
SPI_HOST 838 840 99.76 95.09
SPI_DEVICE/1R1W 1128 1151 98.00 92.62
SPI_DEVICE/2P 1151 1151 100.00 93.16
SRAM_CTRL/MAIN 1172 1190 98.49 95.66
SRAM_CTRL/RET 1164 1190 97.82 95.64
SYSRST_CTRL 901 932 96.67 97.83
UART 1259 1320 95.38 94.52
USBDEV 3909 3970 98.46 97.31
GPIO 970 1020 95.10 96.08
ALERT_HANDLER 771 850 90.71 98.81
CLKMGR 954 960 99.38 96.97
FLASH_CTRL 1001 1281 78.14 96.19
OTP_CTRL 1154 1343 85.93 87.86
PWM 115 276 41.67 99.11
PWRMGR 519 1070 48.50 95.36
RSTMGR_CNSTY_CHK 9 10 90.00 95.87
RSTMGR 620 620 100.00 99.27
XBAR_MAIN 900 900 100.00 99.02
XBAR_PERI 900 900 100.00 99.03
CHIP 2752 2956 93.10 90.06