Simulation Results

Block	Tests			Coverage Summary				Code Coverage
Block	Pass	Total	%	Overall	Code	Functional	Assertion	Block	Line	Branch	Condition	Toggle	FSM
ADC_CTRL	135	233	57.94	67.33	95.61	13.66	92.71	-	98.86	97.40	87.43	99.76	94.59
AES/MASKED	1009	1110	90.90	97.37	96.59	97.13	98.38	96.92	97.83	92.69	-	98.08	97.78
AES/UNMASKED	992	1110	89.37	95.94	92.95	96.94	97.92	93.93	95.29	87.43	-	97.99	91.11
ALERT_HANDLER	529	593	89.21	98.94	98.93	98.99	98.91	-	99.99	99.99	97.49	97.19	100.00
AON_TIMER	180	180	100.00	99.09	99.17	100.00	98.10	-	99.09	98.56	99.05	100.00	-
CHIP	1757	2005	87.63	93.44	82.94	99.38	98.00	-	94.84	94.72	92.94	75.05	57.14
CLKMGR	239	273	87.55	93.87	98.55	87.31	95.76	-	99.07	98.74	95.73	99.19	100.00
CSRNG	1358	1403	96.79	94.27	96.20	89.68	96.94	98.53	99.54	96.38	-	93.64	95.24
EDN/EDN0	674	688	97.97	95.70	95.77	92.86	98.48	-	98.91	96.51	93.85	97.12	92.47
EDN/EDN1	675	688	98.11	95.42	96.12	92.23	97.92	-	98.48	94.59	94.77	96.15	96.59
ENTROPY_SRC/RNG_4BITS	2395	2453	97.64	90.91	90.50	92.26	89.98	95.18	97.82	88.06	-	79.25	96.88
FLASH_CTRL	1146	1154	99.31	96.97	95.43	98.45	97.02	-	96.09	97.40	94.73	96.41	92.52
GPIO	233	253	92.09	97.78	94.91	100.00	98.42	-	99.76	99.80	99.57	80.52	-
HMAC	694	694	100.00	98.81	99.22	99.62	97.60	-	99.74	99.67	96.69	100.00	100.00
I2C	592	755	78.41	89.06	80.39	89.32	97.46	-	97.25	93.83	89.21	74.04	47.62
KEYMGR	637	653	97.55	95.87	98.84	91.05	97.72	-	99.20	99.18	98.08	97.75	100.00
KMAC/MASKED	290	540	53.70	81.56	66.43	83.88	94.37	-	97.20	90.28	85.44	23.15	36.08
KMAC/UNMASKED	284	540	52.59	80.08	64.32	81.62	94.31	-	95.58	88.81	85.00	21.54	30.66
LC_CTRL/VOLATILE_UNLOCK_DISABLED	515	523	98.47	92.33	85.73	96.42	94.83	-	97.28	93.85	81.91	88.33	67.29
LC_CTRL/VOLATILE_UNLOCK_ENABLED	514	523	98.28	92.35	85.88	96.06	95.11	-	97.26	93.95	81.62	88.33	68.22
OTBN	422	436	96.79	94.69	87.02	100.00	97.04	99.37	99.55	95.41	-	85.49	67.61
OTP_CTRL	800	903	88.59	91.18	85.49	92.59	95.47	-	90.21	86.80	94.08	92.49	63.89
PRIM_ALERT	60	60	100.00	91.54	97.02	-	86.05	-	100.00	95.83	100.00	100.00	89.29
PRIM_ESC	20	20	100.00	89.09	92.99	-	85.19	-	95.41	88.89	87.80	100.00	92.86
PRIM_LFSR	4	4	100.00	97.07	99.14	-	95.00	-	100.00	100.00	96.55	100.00	-
PRIM_PRESENT	1	1	100.00	95.88	91.76	-	100.00	-	90.41	100.00	100.00	76.63	-
PRIM_PRINCE	10	10	100.00	100.00	100.00	-	100.00	-	100.00	100.00	100.00	100.00	-
PWRMGR	261	273	95.60	98.50	97.54	99.01	98.96	-	99.09	96.37	96.61	99.62	96.00
ROM_CTRL/32KB	133	156	85.26	96.58	92.63	99.28	97.82	-	98.66	99.27	96.58	95.33	73.33
ROM_CTRL/64KB	134	156	85.90	96.53	92.64	99.28	97.68	-	98.66	99.27	96.58	95.34	73.33
RSTMGR	148	148	100.00	99.12	99.66	98.76	98.93	-	99.51	99.83	99.31	100.00	-
RSTMGR_CNSTY_CHK	10	10	100.00	97.52	95.05	-	100.00	-	98.41	98.31	86.21	100.00	92.31
RV_DM/USE_JTAG_INTERFACE	331	368	89.95	80.82	89.02	57.56	95.87	-	96.25	90.50	90.69	71.58	96.10
RV_TIMER	187	223	83.86	97.69	94.66	100.00	98.41	-	100.00	100.00	100.00	78.66	-
SPI_DEVICE/1R1W	394	416	94.71	95.27	91.47	98.81	95.52	-	98.89	98.28	96.52	74.30	89.36
SPI_HOST	217	220	98.64	92.95	91.30	90.76	96.79	96.96	98.76	93.35	-	73.07	100.00
SRAM_CTRL/MAIN	248	248	100.00	96.96	95.97	96.80	98.10	96.36	97.04	94.64	-	92.22	100.00
SRAM_CTRL/RET	247	248	99.60	92.45	82.46	96.80	98.08	93.95	95.06	89.80	-	78.32	66.67
SYSRST_CTRL	396	410	96.59	93.81	97.89	85.08	98.47	-	99.27	99.33	97.88	100.00	92.95
TL_AGENT	10	10	100.00	-	-	-	-	-	-	-	-	-	-
UART	438	453	96.69	96.89	92.64	99.19	98.85	-	99.48	98.14	98.25	74.67	-
USBDEV	1757	1780	98.71	97.55	96.91	98.46	97.29	-	98.79	98.34	95.48	97.03	94.92
XBAR_MAIN	450	450	100.00	99.24	99.12	100.00	98.60	-	100.00	100.00	96.79	99.69	-
XBAR_PERI	450	450	100.00	99.50	99.13	99.68	99.69	-	100.00	100.00	96.51	100.00	-

Simulation Results: top_earlgrey_batch_sim