Simulation Results: top_earlgrey_batch_sim

 
12/05/2026 15:30:21 DVSim: v1.34.0 sha: d723749 json Branch: master
Block Tests Coverage Summary Code Coverage
Pass Total % Overall Code Functional Assertion Block Line Branch Condition Toggle FSM
ADC_CTRL
15 25 60.00 65.84 93.29 13.14 91.09 - 97.97 96.23 86.02 99.76 86.49
AES/MASKED
32 32 100.00 89.40 93.76 76.21 98.23 94.46 96.11 87.60 - 97.99 93.33
AES/UNMASKED
31 32 96.88 87.33 89.42 74.85 97.73 89.94 92.46 80.55 - 97.99 86.67
ALERT_HANDLER
24 26 92.31 85.80 89.42 77.20 90.79 - 99.62 98.42 91.30 86.79 70.97
AON_TIMER
23 23 100.00 96.46 98.75 93.96 96.67 - 99.09 98.56 98.93 98.41 -
CHIP
252 329 76.60 77.68 84.81 50.85 97.37 - 94.30 93.09 88.33 91.19 57.14
CLKMGR
24 27 88.89 90.48 97.01 81.48 92.94 - 98.59 97.96 89.29 99.19 100.00
CSRNG
17 19 89.47 87.48 92.23 77.84 92.36 96.88 97.69 92.17 - 93.37 85.71
EDN/EDN0
20 21 95.24 87.43 84.52 80.16 97.61 - 98.48 94.70 88.33 87.84 53.23
EDN/EDN1
21 21 100.00 86.96 83.69 80.04 97.14 - 97.72 92.42 90.69 95.57 42.05
ENTROPY_SRC/RNG_4BITS
22 22 100.00 75.74 88.72 54.75 83.74 94.38 97.06 86.69 - 76.36 94.79
FLASH_CTRL
79 79 100.00 94.95 94.12 95.67 95.05 - 96.05 97.16 93.93 97.73 85.71
GPIO
25 27 92.59 98.02 97.23 100.00 96.84 - 99.76 99.80 98.27 91.08 -
HMAC
28 28 100.00 79.39 97.14 44.34 96.70 - 99.69 99.01 95.84 100.00 91.18
I2C
44 50 88.00 84.97 81.54 77.17 96.19 - 96.41 92.33 84.89 89.45 44.64
KEYMGR
29 30 96.67 87.52 96.60 68.47 97.49 - 98.96 97.99 93.00 97.72 95.35
KMAC/MASKED
40 40 100.00 93.92 90.08 93.84 97.84 - 98.69 96.11 93.35 99.57 62.68
KMAC/UNMASKED
39 40 97.50 92.22 88.27 90.48 97.90 - 97.14 94.71 90.91 99.92 58.68
LC_CTRL/VOLATILE_UNLOCK_DISABLED
38 39 97.44 90.19 84.08 92.35 94.13 - 97.19 94.00 79.59 87.02 62.62
LC_CTRL/VOLATILE_UNLOCK_ENABLED
38 39 97.44 90.41 83.33 93.77 94.13 - 97.13 93.37 78.94 81.80 65.42
OTBN
40 42 95.24 94.40 95.29 98.31 89.59 99.39 99.54 92.32 - 91.75 97.56
OTP_CTRL
30 30 100.00 82.67 79.57 74.44 93.99 - 88.64 84.30 92.46 87.13 45.31
PATTGEN
15 18 83.33 95.08 98.87 89.42 96.95 100.00 100.00 100.00 - 96.61 -
PRIM_ALERT
5 5 100.00 90.41 94.76 - 86.05 - 100.00 95.83 95.83 100.00 82.14
PRIM_ESC
1 1 100.00 84.44 83.70 - 85.19 - 89.91 77.78 82.93 100.00 67.86
PRIM_LFSR
4 4 100.00 97.07 99.14 - 95.00 - 100.00 100.00 96.55 100.00 -
PRIM_PRESENT
1 1 100.00 95.88 91.76 - 100.00 - 90.41 100.00 100.00 76.63 -
PRIM_PRINCE
1 1 100.00 100.00 100.00 - 100.00 - 100.00 100.00 100.00 100.00 -
PWM
17 17 100.00 97.49 96.12 98.35 98.00 98.98 99.28 98.21 - 90.87 -
PWRMGR
25 28 89.29 96.00 94.64 97.03 96.34 - 98.92 95.61 94.63 90.02 94.00
ROM_CTRL/32KB
19 19 100.00 98.00 99.58 97.61 96.80 - 99.59 99.64 98.66 100.00 100.00
ROM_CTRL/64KB
19 19 100.00 96.30 94.95 97.14 96.80 - 99.46 98.54 96.73 100.00 80.00
RSTMGR
19 19 100.00 97.38 99.27 95.02 97.86 - 99.51 99.83 98.40 99.33 -
RSTMGR_CNSTY_CHK
1 1 100.00 97.52 95.05 - 100.00 - 98.41 98.31 86.21 100.00 92.31
RV_DM/USE_JTAG_INTERFACE
52 53 98.11 78.05 86.16 52.68 95.31 - 94.93 88.50 88.43 75.84 83.12
RV_TIMER
16 19 84.21 96.17 99.92 91.76 96.82 - 100.00 100.00 99.69 100.00 -
SPI_DEVICE/1R1W
31 33 93.94 84.30 93.10 66.91 92.89 - 98.83 98.13 95.64 83.54 89.36
SPI_DEVICE/2P
33 33 100.00 81.20 92.90 56.20 94.49 - 98.66 97.94 95.38 87.39 85.11
SPI_HOST
25 26 96.15 92.50 94.90 88.66 93.94 96.78 98.54 93.05 - 88.02 100.00
SRAM_CTRL/MAIN
31 31 100.00 95.34 96.55 93.00 96.46 95.74 96.44 93.68 - 96.09 100.00
SRAM_CTRL/RET
31 31 100.00 91.13 82.49 94.60 96.29 92.64 93.69 87.32 - 82.28 66.67
SYSRST_CTRL
27 27 100.00 84.03 92.91 64.83 94.35 - 97.51 97.40 95.76 99.54 74.36
TL_AGENT
1 1 100.00 - - - - - - - - - -
UART
25 27 92.59 82.82 96.80 54.55 97.12 - 99.48 98.14 98.02 91.55 -
USBDEV
98 100 98.00 87.90 94.96 72.53 96.20 - 98.70 98.21 94.44 97.02 86.44
XBAR_MAIN
18 18 100.00 85.26 99.14 58.70 97.93 - 100.00 100.00 96.55 100.00 -
XBAR_PERI
18 18 100.00 73.02 98.95 21.75 98.35 - 100.00 100.00 95.79 100.00 -