Simulation Results: top_earlgrey_batch_sim

 
24/08/2026 15:30:30 DVSim: v1.51.2 sha: 4243cf5 JSON Branch: master
Block Tests Coverage Summary Code Coverage
Pass Total % Overall Code Functional Assertion Block Line Branch Condition Toggle FSM
ADC_CTRL
25 25 100.00 70.86 97.87 17.96 96.76 - 99.02 98.45 94.58 100.00 97.30
AES/MASKED
29 32 90.62 87.40 93.60 70.36 98.23 94.26 95.94 87.16 - 97.99 93.33
AES/UNMASKED
27 32 84.38 87.32 89.67 74.57 97.73 89.36 91.54 80.25 - 97.99 88.89
ALERT_HANDLER
24 26 92.31 89.87 90.90 80.66 98.06 - 99.68 98.25 90.56 91.80 74.19
AON_TIMER
23 23 100.00 96.47 99.17 92.13 98.10 - 99.09 98.56 99.05 100.00 -
CHIP
252 308 81.82 71.23 75.80 41.16 96.74 - 93.69 93.28 88.48 70.20 33.33
CLKMGR
26 27 96.30 93.57 98.28 86.96 95.48 - 99.00 98.64 94.56 99.19 100.00
CSRNG
17 19 89.47 77.13 89.35 47.95 94.10 95.31 95.95 88.65 - 87.09 85.71
EDN/EDN0
21 21 100.00 85.79 82.35 79.37 95.66 - 97.45 91.35 87.23 79.79 55.91
EDN/EDN1
21 21 100.00 87.87 83.25 81.93 98.44 - 98.18 93.51 90.15 87.80 46.59
ENTROPY_SRC/RNG_4BITS
21 23 91.30 72.67 86.76 47.17 84.07 94.13 96.96 85.82 - 75.71 88.54
GPIO
24 27 88.89 96.90 92.92 99.99 97.78 - 98.93 99.01 98.13 75.61 -
HMAC
28 28 100.00 75.94 86.53 43.69 97.60 - 99.64 99.35 96.30 46.17 91.18
I2C
44 50 88.00 84.83 78.08 78.96 97.46 - 96.01 91.77 85.12 74.04 43.45
KEYMGR_DPE/EARLGREY
12 14 85.71 65.08 82.56 15.02 97.67 - 97.48 93.77 86.63 59.23 75.68
KMAC/MASKED
29 40 72.50 80.13 65.69 80.62 94.09 - 97.03 89.59 84.04 22.98 34.81
KMAC/UNMASKED
30 40 75.00 79.56 64.89 80.06 93.72 - 95.96 89.64 86.66 21.54 30.66
LC_CTRL/VOLATILE_UNLOCK_DISABLED
37 39 94.87 90.65 84.42 92.83 94.69 - 97.24 93.76 79.59 87.98 63.55
LC_CTRL/VOLATILE_UNLOCK_ENABLED
39 39 100.00 90.77 83.98 93.37 94.97 - 97.04 93.29 79.28 86.72 63.55
OTBN
40 42 95.24 91.65 86.22 98.73 90.00 99.23 99.45 94.45 - 84.76 66.20
OTP_CTRL
28 30 93.33 82.85 79.67 74.04 94.83 - 88.77 84.49 92.67 86.94 45.49
PRIM_ALERT
5 5 100.00 90.76 95.47 - 86.05 - 100.00 95.83 95.83 100.00 85.71
PRIM_ESC
1 1 100.00 84.87 84.55 - 85.19 - 90.83 80.00 80.49 100.00 71.43
PRIM_LFSR
4 4 100.00 97.07 99.14 - 95.00 - 100.00 100.00 96.55 100.00 -
PRIM_PRESENT
1 1 100.00 89.63 79.26 - 100.00 - 90.41 75.00 75.00 76.63 -
PRIM_PRINCE
1 1 100.00 100.00 100.00 - 100.00 - 100.00 100.00 100.00 100.00 -
PWRMGR
24 29 82.76 95.77 92.82 96.05 98.43 - 99.09 96.19 95.19 99.62 74.00
ROM_CTRL/192KB
18 19 94.74 97.18 96.94 97.36 97.24 - 99.08 98.92 98.37 95.00 93.33
RSTMGR
19 19 100.00 97.43 99.34 94.28 98.66 - 99.51 99.83 98.68 99.33 -
RSTMGR_CNSTY_CHK
1 1 100.00 97.81 95.61 - 100.00 - 98.46 98.39 88.89 100.00 92.31
RV_DM/USE_JTAG_INTERFACE
51 53 96.23 74.44 85.20 42.42 95.71 - 95.78 89.07 88.89 69.15 83.12
RV_TIMER
17 19 89.47 92.28 94.66 84.41 97.77 - 100.00 100.00 100.00 78.66 -
SPI_DEVICE/1R1W
31 33 93.94 87.96 91.39 77.23 95.27 - 98.89 98.22 96.16 74.30 89.36
SPI_HOST
26 26 100.00 91.64 91.30 89.50 94.14 96.96 98.76 93.35 - 73.07 100.00
SRAM_CTRL/MAIN
29 31 93.55 94.87 93.72 93.20 97.69 92.73 93.64 89.45 - 91.79 100.00
SRAM_CTRL/RET
29 31 93.55 90.63 81.75 92.20 97.95 92.19 93.78 88.23 - 78.32 66.67
SYSRST_CTRL
27 27 100.00 84.42 91.41 70.65 91.19 - 96.33 96.63 94.23 100.00 69.87
TL_AGENT
1 1 100.00 - - - - - - - - - -
UART
25 27 92.59 81.10 90.99 53.74 98.56 - 98.86 96.50 93.93 74.67 -
USBDEV
98 100 98.00 87.96 93.41 73.35 97.11 - 98.58 97.92 94.06 96.82 79.66
XBAR_MAIN
18 18 100.00 78.07 99.09 37.34 97.78 - 100.00 100.00 96.97 99.37 -
XBAR_PERI
18 18 100.00 79.02 99.13 39.79 98.13 - 100.00 100.00 96.51 100.00 -