Simulation Results: top_earlgrey_batch_sim

 
03/09/2026 19:45:14 DVSim: v1.52.1 sha: 119f86a JSON Branch: master
Block Tests Coverage Summary Code Coverage
Pass Total % Overall Code Functional Assertion Block Line Branch Condition Toggle FSM
ADC_CTRL
21 25 84.00 70.27 95.65 18.39 96.76 - 99.02 98.45 94.29 100.00 86.49
AES/MASKED
29 32 90.62 89.43 93.81 76.10 98.38 94.50 96.22 87.71 - 97.99 93.33
AES/UNMASKED
30 32 93.75 87.47 90.29 74.38 97.73 90.26 92.62 81.67 - 97.99 88.89
ALERT_HANDLER
24 26 92.31 89.70 90.36 80.86 97.87 - 99.66 98.63 92.46 88.49 72.58
AON_TIMER
23 23 100.00 96.17 99.17 92.65 96.67 - 99.09 98.56 99.05 100.00 -
CHIP
250 308 81.17 73.72 75.91 48.52 96.74 - 93.78 93.30 89.08 70.04 33.33
CLKMGR
26 27 96.30 92.98 98.15 85.59 95.20 - 98.98 98.59 93.98 99.19 100.00
CSRNG
18 19 94.74 84.33 92.34 67.41 93.23 97.02 97.73 92.60 - 93.31 85.71
EDN/EDN0
21 21 100.00 84.04 77.90 78.77 95.44 - 96.63 88.42 84.91 73.29 46.24
EDN/EDN1
21 21 100.00 86.95 81.95 80.46 98.44 - 98.18 93.29 88.00 85.94 44.32
ENTROPY_SRC/RNG_4BITS
21 23 91.30 71.81 84.62 46.91 83.91 93.56 96.49 84.61 - 76.12 81.25
GPIO
26 27 96.30 97.41 94.77 100.00 97.47 - 99.76 99.80 98.99 80.52 -
HMAC
28 28 100.00 75.78 86.91 42.83 97.60 - 99.64 98.86 95.74 46.17 94.12
I2C
44 50 88.00 85.15 78.29 81.18 95.98 - 96.35 92.12 85.08 73.87 44.05
KEYMGR_DPE/EARLGREY
12 14 85.71 65.18 82.68 15.19 97.67 - 97.60 93.77 86.84 59.49 75.68
KMAC/MASKED
29 40 72.50 80.74 66.25 81.75 94.23 - 97.16 90.02 84.96 23.02 36.08
KMAC/UNMASKED
29 40 72.50 78.25 63.66 76.78 94.31 - 95.59 88.44 82.10 21.49 30.66
LC_CTRL/VOLATILE_UNLOCK_DISABLED
35 39 89.74 89.41 83.06 91.04 94.13 - 97.15 93.47 79.52 83.46 61.68
LC_CTRL/VOLATILE_UNLOCK_ENABLED
36 39 92.31 90.43 83.55 93.19 94.55 - 97.00 93.14 79.28 82.90 65.42
OTBN
40 45 88.89 91.42 86.08 98.31 89.86 99.22 99.44 94.34 - 84.35 66.20
OTP_CTRL
27 30 90.00 79.31 76.89 66.59 94.44 - 88.49 83.18 90.30 77.67 44.79
PRIM_ALERT
5 5 100.00 91.12 96.19 - 86.05 - 100.00 95.83 95.83 100.00 89.29
PRIM_ESC
1 1 100.00 85.47 85.75 - 85.19 - 90.83 80.00 82.93 100.00 75.00
PRIM_LFSR
4 4 100.00 97.07 99.14 - 95.00 - 100.00 100.00 96.55 100.00 -
PRIM_PRESENT
1 1 100.00 89.63 79.26 - 100.00 - 90.41 75.00 75.00 76.63 -
PRIM_PRINCE
1 1 100.00 100.00 100.00 - 100.00 - 100.00 100.00 100.00 100.00 -
PWRMGR
23 29 79.31 95.59 94.38 96.05 96.34 - 98.93 95.62 93.35 90.02 94.00
ROM_CTRL/192KB
18 19 94.74 94.20 95.28 90.65 96.66 - 98.95 98.56 97.33 94.90 86.67
RSTMGR
19 19 100.00 97.63 99.08 95.27 98.53 - 99.51 99.83 98.06 98.91 -
RSTMGR_CNSTY_CHK
1 1 100.00 97.53 95.05 - 100.00 - 98.46 98.39 86.11 100.00 92.31
RV_DM/USE_JTAG_INTERFACE
51 53 96.23 74.68 84.41 43.67 95.95 - 95.25 88.25 88.33 69.70 80.52
RV_TIMER
17 19 89.47 93.73 94.66 89.71 96.82 - 100.00 100.00 100.00 78.66 -
SPI_DEVICE/1R1W
31 33 93.94 85.20 91.33 69.00 95.27 - 98.89 98.22 95.88 74.30 89.36
SPI_HOST
26 26 100.00 92.05 91.30 88.24 96.60 96.96 98.76 93.35 - 73.07 100.00
SRAM_CTRL/MAIN
29 31 93.55 95.45 93.73 95.20 97.42 92.73 93.64 89.45 - 91.84 100.00
SRAM_CTRL/RET
29 31 93.55 90.60 81.71 92.96 97.12 92.12 93.78 88.07 - 78.32 66.67
SYSRST_CTRL
24 27 88.89 75.81 81.44 63.60 82.39 - 91.83 92.32 90.87 98.86 33.33
TL_AGENT
1 1 100.00 - - - - - - - - - -
UART
26 27 96.30 84.54 91.62 64.00 97.98 - 99.17 97.44 95.22 74.67 -
USBDEV
97 100 97.00 88.78 94.17 74.89 97.29 - 98.70 98.05 94.15 96.92 83.05
XBAR_MAIN
18 18 100.00 84.84 99.09 57.09 98.35 - 100.00 100.00 96.97 99.37 -
XBAR_PERI
18 18 100.00 79.19 99.09 40.17 98.31 - 100.00 100.00 96.38 100.00 -