TOP_EARLGREY_BATCH_SIM Simulation Results (Summary)

Sunday May 11 2025 00:08:57 UTC

GitHub Revision: 4c0a27d

Branch: master

Name	Passing	Total	Pass Rate	Coverage
TL_AGENT	50	50	100.00	--
ADC_CTRL	899	920	97.72	97.65
AES/UNMASKED	1537	1602	95.94	97.32
AES/MASKED	1567	1602	97.82	98.43
AON_TIMER	315	315	100.00	100.00
CSRNG	1614	1630	99.02	97.73
EDN	1111	1130	98.32	95.94
ENTROPY_SRC	1698	2570	66.07	96.17
HMAC	821	821	100.00	91.97
I2C	1852	2042	90.70	87.89
KEYMGR	1042	1110	93.87	97.78
KMAC/MASKED	927	940	98.62	95.34
KMAC/UNMASKED	918	940	97.66	93.94
LC_CTRL/VOLATILE_UNLOCK_DISABLED	1000	1030	97.09	90.18
LC_CTRL/VOLATILE_UNLOCK_ENABLED	996	1030	96.70	90.19
OTBN	567	585	96.92	99.04
PATTGEN	443	570	77.72	98.72
PRIM_ALERT	79	80	98.75	95.19
PRIM_ESC	20	20	100.00	92.29
PRIM_LFSR	200	200	100.00	98.31
PRIM_PRESENT	50	50	100.00	93.41
PRIM_PRINCE	500	500	100.00	100.00
ROM_CTRL/32KB	264	266	99.25	99.67
ROM_CTRL/64KB	265	266	99.62	99.67
RV_DM/USE_JTAG_INTERFACE	395	483	81.78	76.51
RV_TIMER	350	350	100.00	100.00
SPI_HOST	838	840	99.76	96.26
SPI_DEVICE/1R1W	1130	1151	98.18	94.54
SPI_DEVICE/2P	1149	1151	99.83	95.17
SRAM_CTRL/MAIN	1168	1190	98.15	96.06
SRAM_CTRL/RET	1169	1190	98.24	96.06
SYSRST_CTRL	911	932	97.75	97.00
UART	1315	1320	99.62	97.78
USBDEV	3905	3965	98.49	97.62
GPIO	970	1020	95.10	98.82
ALERT_HANDLER	656	850	77.18	98.92
CLKMGR	952	960	99.17	97.07
FLASH_CTRL	999	1281	77.99	95.11
OTP_CTRL	1078	1343	80.27	93.14
PWM	115	276	41.67	99.21
PWRMGR	1067	1070	99.72	98.02
RSTMGR_CNSTY_CHK	10	10	100.00	95.87
RSTMGR	620	620	100.00	99.48
XBAR_MAIN	900	900	100.00	99.17
XBAR_PERI	900	900	100.00	99.16
CHIP	2757	2955	93.30	95.48