Simulation Results: top_earlgrey_batch_sim

 
05/05/2026 15:30:24 DVSim: v1.34.0 sha: f7bfc3b json Branch: master
Block Tests Coverage Summary Code Coverage
Pass Total % Overall Code Functional Assertion Block Line Branch Condition Toggle FSM
ADC_CTRL
15 25 60.00 65.12 92.64 11.64 91.09 - 98.03 96.29 86.06 99.05 83.78
AES/MASKED
31 35 88.57 86.67 95.19 66.67 98.14 95.63 97.37 89.22 - 98.05 96.13
AES/UNMASKED
29 35 82.86 84.72 91.61 64.80 97.75 90.99 93.15 83.82 - 97.99 91.49
ALERT_HANDLER
26 26 100.00 92.01 93.73 83.96 98.33 - 99.75 98.72 92.89 91.79 85.48
AON_TIMER
23 23 100.00 95.94 98.75 92.39 96.67 - 99.09 98.56 98.81 98.53 -
CHIP
254 328 77.44 75.64 84.97 44.59 97.37 - 94.33 93.55 88.58 91.23 57.14
CLKMGR
26 27 96.30 93.41 98.37 86.11 95.76 - 99.01 98.62 95.02 99.19 100.00
CSRNG
18 19 94.74 88.54 92.31 80.07 93.23 96.98 97.73 92.42 - 93.37 85.71
EDN/EDN0
21 21 100.00 87.15 83.92 80.56 96.96 - 98.21 94.28 88.68 84.67 53.76
EDN/EDN1
21 21 100.00 86.75 82.86 80.25 97.14 - 98.18 93.51 89.38 86.65 46.59
ENTROPY_SRC/RNG_4BITS
22 22 100.00 74.30 88.60 50.87 83.42 94.75 97.39 87.07 - 76.20 93.75
FLASH_CTRL
78 79 98.73 92.97 93.94 95.54 89.42 - 95.97 97.06 94.03 98.31 84.35
GPIO
25 27 92.59 98.03 97.26 99.99 96.84 - 99.76 99.80 98.41 91.08 -
HMAC
28 28 100.00 79.28 97.18 43.96 96.70 - 99.59 99.17 95.95 100.00 91.18
I2C
42 50 84.00 86.88 81.47 82.98 96.19 - 96.41 92.33 84.89 89.66 44.05
KEYMGR
30 30 100.00 87.83 95.31 70.70 97.49 - 98.76 97.63 94.00 97.80 88.37
KMAC/MASKED
40 40 100.00 93.81 90.62 92.84 97.98 - 98.78 96.37 92.82 99.65 65.49
KMAC/UNMASKED
40 40 100.00 93.32 88.70 93.51 97.75 - 97.23 95.20 94.07 100.00 57.02
LC_CTRL/VOLATILE_UNLOCK_DISABLED
38 39 97.44 89.67 83.42 91.46 94.13 - 97.12 93.82 79.59 85.80 60.75
LC_CTRL/VOLATILE_UNLOCK_ENABLED
39 39 100.00 90.71 84.42 93.59 94.13 - 97.15 93.62 78.94 88.86 63.55
OTBN
40 42 95.24 93.98 95.34 97.03 89.57 99.40 99.57 92.40 - 91.95 97.44
OTP_CTRL
28 30 93.33 83.17 79.36 75.96 94.18 - 88.78 83.40 90.27 89.22 45.14
PATTGEN
15 18 83.33 95.08 98.87 89.42 96.95 100.00 100.00 100.00 - 96.61 -
PRIM_ALERT
5 5 100.00 90.55 95.06 - 86.05 - 100.00 95.83 93.75 100.00 85.71
PRIM_ESC
1 1 100.00 83.19 81.19 - 85.19 - 88.07 75.56 78.05 100.00 64.29
PRIM_LFSR
4 4 100.00 97.07 99.14 - 95.00 - 100.00 100.00 96.55 100.00 -
PRIM_PRESENT
1 1 100.00 95.88 91.76 - 100.00 - 90.41 100.00 100.00 76.63 -
PRIM_PRINCE
1 1 100.00 100.00 100.00 - 100.00 - 100.00 100.00 100.00 100.00 -
PWM
17 17 100.00 97.61 96.14 98.68 98.00 99.02 99.28 98.27 - 90.87 -
PWRMGR
24 28 85.71 95.08 94.43 94.73 96.08 - 98.92 95.42 93.78 90.02 94.00
ROM_CTRL/32KB
19 19 100.00 97.76 99.26 97.37 96.66 - 99.59 99.27 98.22 99.24 100.00
ROM_CTRL/64KB
19 19 100.00 96.80 98.12 95.47 96.80 - 99.59 99.64 98.07 99.97 93.33
RSTMGR
19 19 100.00 97.23 99.18 94.78 97.72 - 99.51 99.83 98.47 98.91 -
RSTMGR_CNSTY_CHK
1 1 100.00 97.52 95.05 - 100.00 - 98.41 98.31 86.21 100.00 92.31
RV_DM/USE_JTAG_INTERFACE
50 53 94.34 76.85 85.07 50.18 95.31 - 95.21 88.62 88.21 74.09 79.22
RV_TIMER
16 19 84.21 97.57 100.00 95.88 96.82 - 100.00 100.00 100.00 100.00 -
SPI_DEVICE/1R1W
31 33 93.94 83.33 93.26 62.10 94.64 - 99.05 98.25 96.10 83.54 89.36
SPI_DEVICE/2P
33 33 100.00 88.36 94.12 76.34 94.62 - 99.10 98.33 96.07 87.74 89.36
SPI_HOST
26 26 100.00 92.61 95.03 88.66 94.13 96.96 98.76 93.35 - 88.02 100.00
SRAM_CTRL/MAIN
31 31 100.00 95.15 95.47 93.80 96.19 94.39 94.88 90.92 - 96.09 100.00
SRAM_CTRL/RET
31 31 100.00 90.64 82.76 93.00 96.15 92.98 93.99 88.11 - 82.28 66.67
SYSRST_CTRL
26 27 96.30 82.65 93.99 60.39 93.58 - 97.47 97.59 94.77 100.00 80.13
TL_AGENT
1 1 100.00 - - - - - - - - - -
UART
26 27 96.30 83.63 95.79 58.28 96.83 - 99.17 97.44 95.22 91.32 -
USBDEV
98 100 98.00 87.96 94.15 75.16 94.58 - 98.62 98.08 94.00 97.02 83.05
XBAR_MAIN
18 18 100.00 81.08 99.12 46.30 97.83 - 100.00 100.00 96.50 100.00 -
XBAR_PERI
18 18 100.00 79.69 98.89 42.08 98.11 - 100.00 100.00 95.55 100.00 -