Simulation Results: top_earlgrey_batch_sim

 
27/05/2026 15:30:30 DVSim: v1.49.6 sha: d967e2f JSON Branch: master
Block Tests Coverage Summary Code Coverage
Pass Total % Overall Code Functional Assertion Block Line Branch Condition Toggle FSM
ADC_CTRL
16 25 64.00 66.23 93.26 13.36 92.06 - 98.00 96.29 85.98 99.53 86.49
AES/MASKED
31 32 96.88 89.45 94.16 75.82 98.38 94.28 95.91 87.16 - 97.99 95.56
AES/UNMASKED
31 32 96.88 87.11 89.34 74.27 97.73 89.84 92.41 80.28 - 97.99 86.67
ALERT_HANDLER
23 26 88.46 87.84 90.70 74.58 98.23 - 99.73 98.46 91.45 84.84 79.03
AON_TIMER
23 23 100.00 95.81 98.78 90.55 98.10 - 99.09 98.56 98.93 98.53 -
CHIP
253 329 76.90 78.84 85.43 53.71 97.37 - 94.44 94.16 90.17 91.25 57.14
CLKMGR
23 27 85.19 91.31 96.94 84.05 92.94 - 98.54 97.85 89.59 98.71 100.00
CSRNG
17 19 89.47 87.26 92.19 75.26 94.32 96.92 97.73 92.35 - 92.97 85.71
EDN/EDN0
21 21 100.00 88.18 86.17 80.75 97.61 - 98.75 95.96 89.26 90.97 55.91
EDN/EDN1
21 21 100.00 87.87 83.87 81.30 98.44 - 97.95 93.07 90.69 95.57 42.05
ENTROPY_SRC/RNG_4BITS
22 22 100.00 75.52 88.96 53.36 84.24 94.49 97.19 86.80 - 76.02 95.83
FLASH_CTRL
78 79 98.73 95.60 94.15 95.82 96.84 - 95.96 97.19 93.62 97.59 86.39
GPIO
25 27 92.59 98.50 97.07 100.00 98.42 - 99.76 99.80 97.98 90.74 -
HMAC
28 28 100.00 80.32 97.80 45.36 97.80 - 99.64 99.34 95.90 100.00 94.12
I2C
42 50 84.00 87.74 81.73 84.25 97.25 - 96.54 92.55 87.03 89.66 42.86
KEYMGR
29 30 96.67 84.04 94.82 59.82 97.49 - 98.84 97.72 93.12 93.71 90.70
KMAC/MASKED
40 40 100.00 94.88 90.96 94.84 98.85 - 98.96 96.65 93.90 99.81 65.49
KMAC/UNMASKED
40 40 100.00 93.91 89.85 93.22 98.65 - 97.53 95.71 94.01 100.00 61.98
LC_CTRL/VOLATILE_UNLOCK_DISABLED
38 39 97.44 90.93 84.24 93.59 94.97 - 97.19 93.85 79.38 86.27 64.49
LC_CTRL/VOLATILE_UNLOCK_ENABLED
38 39 97.44 89.84 83.50 91.46 94.55 - 97.17 93.80 79.01 86.79 60.75
OTBN
39 42 92.86 94.19 94.27 97.88 90.43 99.33 99.49 91.66 - 88.37 97.56
OTP_CTRL
28 30 93.33 80.30 77.41 68.85 94.63 - 88.44 83.03 90.10 81.72 43.75
PATTGEN
15 18 83.33 95.07 98.87 88.46 97.87 100.00 100.00 100.00 - 96.61 -
PRIM_ALERT
5 5 100.00 90.05 94.05 - 86.05 - 100.00 95.83 95.83 100.00 78.57
PRIM_ESC
1 1 100.00 85.63 86.07 - 85.19 - 92.66 82.22 80.49 100.00 75.00
PRIM_LFSR
4 4 100.00 97.07 99.14 - 95.00 - 100.00 100.00 96.55 100.00 -
PRIM_PRESENT
1 1 100.00 95.88 91.76 - 100.00 - 90.41 100.00 100.00 76.63 -
PRIM_PRINCE
1 1 100.00 100.00 100.00 - 100.00 - 100.00 100.00 100.00 100.00 -
PWM
17 17 100.00 97.40 95.52 98.68 98.00 98.24 98.91 96.79 - 90.87 -
PWRMGR
27 28 96.43 97.83 97.25 98.85 97.39 - 99.09 96.37 95.19 99.62 96.00
ROM_CTRL/32KB
19 19 100.00 97.24 97.91 96.42 97.38 - 99.46 98.91 98.07 99.80 93.33
ROM_CTRL/64KB
19 19 100.00 97.77 99.46 96.90 96.95 - 99.59 99.64 98.22 99.87 100.00
RSTMGR
19 19 100.00 98.02 99.03 96.77 98.26 - 99.51 99.83 97.71 99.08 -
RSTMGR_CNSTY_CHK
1 1 100.00 97.52 95.05 - 100.00 - 98.41 98.31 86.21 100.00 92.31
RV_DM/USE_JTAG_INTERFACE
52 53 98.11 77.85 85.82 52.09 95.63 - 94.67 88.50 87.74 73.77 84.42
RV_TIMER
16 19 84.21 89.17 99.46 70.59 97.45 - 100.00 100.00 97.85 100.00 -
SPI_DEVICE/1R1W
31 33 93.94 85.65 93.09 68.35 95.51 - 98.86 98.20 95.51 83.54 89.36
SPI_DEVICE/2P
33 33 100.00 88.17 93.94 75.20 95.37 - 98.90 98.26 95.44 87.74 89.36
SPI_HOST
26 26 100.00 92.33 95.03 87.82 94.13 96.96 98.76 93.35 - 88.02 100.00
SRAM_CTRL/MAIN
31 31 100.00 96.38 96.78 94.80 97.55 96.08 96.88 94.17 - 96.09 100.00
SRAM_CTRL/RET
31 31 100.00 91.74 83.34 93.80 98.08 93.73 94.89 89.51 - 82.28 66.67
SYSRST_CTRL
27 27 100.00 83.21 93.80 60.53 95.31 - 97.82 97.78 95.18 100.00 78.21
TL_AGENT
1 1 100.00 - - - - - - - - - -
UART
26 27 96.30 82.22 95.87 51.95 98.85 - 99.17 97.44 95.33 91.55 -
USBDEV
98 100 98.00 88.00 94.27 72.44 97.29 - 98.60 98.04 94.44 97.23 83.05
XBAR_MAIN
18 18 100.00 79.71 99.14 42.01 97.99 - 100.00 100.00 96.57 100.00 -
XBAR_PERI
18 18 100.00 74.38 99.13 25.89 98.12 - 100.00 100.00 96.51 100.00 -