Simulation Results: top_earlgrey_batch_sim

 
28/05/2026 15:30:27 DVSim: v1.49.6 sha: 1d0cf80 JSON Branch: master
Block Tests Coverage Summary Code Coverage
Pass Total % Overall Code Functional Assertion Block Line Branch Condition Toggle FSM
ADC_CTRL
15 25 60.00 66.76 94.83 12.92 92.54 - 98.74 97.22 86.52 99.76 91.89
AES/MASKED
31 32 96.88 89.29 94.21 75.44 98.23 94.34 95.95 87.33 - 97.99 95.56
AES/UNMASKED
30 32 93.75 88.21 90.32 76.40 97.92 90.48 92.71 81.71 - 97.99 88.89
ALERT_HANDLER
24 26 92.31 89.81 91.86 79.33 98.23 - 99.72 97.80 91.20 89.92 80.65
AON_TIMER
23 23 100.00 96.39 98.66 92.91 97.62 - 99.09 98.56 98.69 98.28 -
CHIP
250 329 75.99 72.73 84.70 36.12 97.37 - 93.98 92.30 88.84 91.25 57.14
CLKMGR
26 27 96.30 93.41 98.37 86.11 95.76 - 99.02 98.64 94.98 99.19 100.00
CSRNG
16 19 84.21 83.59 92.32 64.13 94.32 97.02 97.73 92.60 - 93.24 85.71
EDN/EDN0
21 21 100.00 86.79 83.71 80.36 96.31 - 97.61 92.33 88.57 87.89 52.15
EDN/EDN1
21 21 100.00 87.45 82.40 81.51 98.44 - 98.10 93.29 89.62 85.56 45.45
ENTROPY_SRC/RNG_4BITS
20 22 90.91 75.54 86.90 55.17 84.56 94.19 96.91 85.98 - 76.15 88.54
FLASH_CTRL
78 79 98.73 94.29 92.84 95.42 94.62 - 95.85 96.62 93.15 94.89 83.67
GPIO
25 27 92.59 98.37 97.34 100.00 97.78 - 99.76 99.80 98.56 91.25 -
HMAC
28 28 100.00 80.21 97.96 44.87 97.80 - 99.69 99.50 96.51 100.00 94.12
I2C
43 50 86.00 85.52 81.61 77.48 97.46 - 96.41 92.33 85.23 89.45 44.64
KEYMGR
30 30 100.00 85.91 95.78 64.24 97.72 - 98.88 97.90 94.32 97.08 90.70
KMAC/MASKED
40 40 100.00 93.98 90.84 92.41 98.70 - 98.89 96.65 92.32 99.43 66.90
KMAC/UNMASKED
40 40 100.00 93.06 88.91 91.77 98.50 - 97.15 95.23 94.33 100.00 57.85
LC_CTRL/VOLATILE_UNLOCK_DISABLED
38 39 97.44 90.10 83.43 92.17 94.69 - 97.19 93.70 79.31 86.19 60.75
LC_CTRL/VOLATILE_UNLOCK_ENABLED
38 39 97.44 90.63 84.15 93.06 94.69 - 97.13 93.37 79.22 88.43 62.62
OTBN
38 42 90.48 94.45 93.97 99.15 90.22 99.31 99.48 91.51 - 87.34 97.56
OTP_CTRL
28 30 93.33 82.63 78.55 74.58 94.75 - 88.57 83.45 90.21 84.34 46.18
PATTGEN
16 18 88.89 95.49 98.87 89.42 98.17 100.00 100.00 100.00 - 96.61 -
PRIM_ALERT
5 5 100.00 90.97 95.89 - 86.05 - 100.00 95.83 97.92 100.00 85.71
PRIM_ESC
1 1 100.00 84.20 83.21 - 85.19 - 89.91 77.78 80.49 100.00 67.86
PRIM_LFSR
4 4 100.00 97.07 99.14 - 95.00 - 100.00 100.00 96.55 100.00 -
PRIM_PRESENT
1 1 100.00 95.88 91.76 - 100.00 - 90.41 100.00 100.00 76.63 -
PRIM_PRINCE
1 1 100.00 100.00 100.00 - 100.00 - 100.00 100.00 100.00 100.00 -
PWM
17 17 100.00 98.05 96.28 98.68 99.20 99.15 99.43 98.53 - 90.87 -
PWRMGR
24 28 85.71 95.48 91.36 97.69 97.39 - 99.09 96.37 96.18 91.15 74.00
ROM_CTRL/32KB
19 19 100.00 98.02 99.48 96.90 97.67 - 99.59 99.64 98.37 99.80 100.00
ROM_CTRL/64KB
19 19 100.00 97.90 99.25 97.37 97.09 - 99.59 99.27 97.47 99.90 100.00
RSTMGR
19 19 100.00 98.57 99.32 98.01 98.39 - 99.51 99.83 98.68 99.25 -
RSTMGR_CNSTY_CHK
1 1 100.00 97.52 95.05 - 100.00 - 98.41 98.31 86.21 100.00 92.31
RV_DM/USE_JTAG_INTERFACE
51 53 96.23 77.75 85.70 51.85 95.71 - 95.20 89.17 88.71 73.60 81.82
RV_TIMER
15 19 78.95 93.98 99.54 85.59 96.82 - 100.00 100.00 98.15 100.00 -
SPI_DEVICE/1R1W
31 33 93.94 87.78 93.20 74.75 95.39 - 98.89 98.25 95.97 83.54 89.36
SPI_DEVICE/2P
33 33 100.00 88.31 93.96 75.60 95.37 - 98.88 98.18 95.81 87.57 89.36
SPI_HOST
26 26 100.00 93.06 95.03 89.08 95.08 96.96 98.76 93.35 - 88.02 100.00
SRAM_CTRL/MAIN
31 31 100.00 96.63 96.81 95.00 98.09 96.08 96.81 94.33 - 96.09 100.00
SRAM_CTRL/RET
31 31 100.00 91.22 83.11 92.60 97.94 93.46 94.59 88.89 - 82.28 66.67
SYSRST_CTRL
27 27 100.00 85.47 92.83 69.52 94.06 - 97.26 97.33 95.25 99.32 75.00
TL_AGENT
1 1 100.00 - - - - - - - - - -
UART
25 27 92.59 78.26 95.21 42.46 97.12 - 98.86 96.50 93.93 91.55 -
USBDEV
98 100 98.00 88.17 94.42 72.80 97.29 - 98.70 98.17 94.19 96.28 84.75
XBAR_MAIN
18 18 100.00 79.28 99.12 40.67 98.04 - 100.00 100.00 96.50 100.00 -
XBAR_PERI
18 18 100.00 72.79 99.13 21.08 98.16 - 100.00 100.00 96.51 100.00 -