Simulation Results: top_earlgrey_batch_sim

 
30/07/2026 15:30:28 DVSim: v1.50.0 sha: 2695753 JSON Branch: master
Block Tests Coverage Summary Code Coverage
Pass Total % Overall Code Functional Assertion Block Line Branch Condition Toggle FSM
ADC_CTRL
15 25 60.00 65.74 92.21 12.94 92.06 - 97.97 96.23 86.02 99.76 81.08
AES/MASKED
29 32 90.62 89.02 94.27 74.57 98.23 94.40 96.02 87.52 - 97.99 95.56
AES/UNMASKED
28 32 87.50 87.46 89.90 74.76 97.73 89.91 92.21 80.51 - 97.99 88.89
ALERT_HANDLER
24 26 92.31 90.98 92.99 81.92 98.04 - 99.77 98.48 92.61 91.85 82.26
AON_TIMER
23 23 100.00 96.19 98.99 92.91 96.67 - 99.09 98.56 98.81 99.50 -
CHIP
240 328 73.17 75.73 81.56 48.14 97.49 - 94.20 93.80 89.03 73.65 57.14
CLKMGR
23 27 85.19 90.46 96.78 81.65 92.94 - 98.50 97.75 88.96 98.71 100.00
CSRNG
17 19 89.47 89.19 94.70 78.31 94.54 96.95 97.76 92.51 - 93.31 95.24
EDN/EDN0
21 21 100.00 85.40 80.81 79.96 95.44 - 97.23 90.38 85.26 81.74 49.46
EDN/EDN1
21 21 100.00 87.05 84.18 79.83 97.14 - 98.18 93.29 89.69 94.29 45.45
ENTROPY_SRC/RNG_4BITS
21 23 91.30 74.39 88.22 51.21 83.74 94.56 97.19 86.86 - 76.10 92.71
FLASH_CTRL
77 79 97.47 95.74 94.01 96.19 97.02 - 95.99 97.14 93.56 96.31 87.07
GPIO
25 27 92.59 98.86 97.85 99.99 98.73 - 99.76 99.80 98.41 93.43 -
HMAC
28 28 100.00 79.13 97.12 42.67 97.60 - 99.69 99.01 95.73 100.00 91.18
I2C
42 50 84.00 85.35 78.35 80.23 97.46 - 96.38 92.26 85.04 74.04 44.05
KEYMGR
29 30 96.67 79.43 92.56 48.23 97.49 - 98.72 97.81 92.64 87.58 86.05
KMAC/MASKED
29 40 72.50 79.57 65.97 78.36 94.37 - 97.12 89.75 83.96 22.92 36.08
KMAC/UNMASKED
28 40 70.00 77.55 63.13 75.36 94.16 - 95.18 87.51 80.80 21.49 30.66
LC_CTRL/VOLATILE_UNLOCK_DISABLED
37 39 94.87 89.69 83.72 91.22 94.13 - 97.28 93.85 79.29 86.48 61.68
LC_CTRL/VOLATILE_UNLOCK_ENABLED
38 39 97.44 90.42 84.27 92.29 94.69 - 97.22 93.66 79.47 85.57 65.42
OTBN
40 42 95.24 89.75 81.89 97.88 89.49 97.72 97.93 81.71 - 81.71 66.20
OTP_CTRL
28 30 93.33 82.16 77.91 73.93 94.64 - 88.43 83.26 90.24 83.70 43.92
PRIM_ALERT
4 5 80.00 90.26 94.46 - 86.05 - 100.00 95.83 97.92 100.00 78.57
PRIM_ESC
1 1 100.00 84.44 83.70 - 85.19 - 89.91 77.78 82.93 100.00 67.86
PRIM_LFSR
4 4 100.00 97.07 99.14 - 95.00 - 100.00 100.00 96.55 100.00 -
PRIM_PRESENT
1 1 100.00 95.88 91.76 - 100.00 - 90.41 100.00 100.00 76.63 -
PRIM_PRINCE
1 1 100.00 100.00 100.00 - 100.00 - 100.00 100.00 100.00 100.00 -
PWRMGR
27 29 93.10 97.95 97.40 98.02 98.43 - 99.09 96.37 95.90 99.62 96.00
ROM_CTRL/32KB
0 19 0.00 - - - - - - - - - -
ROM_CTRL/64KB
0 19 0.00 - - - - - - - - - -
RSTMGR
19 19 100.00 97.31 99.12 94.28 98.53 - 99.51 99.83 98.06 99.08 -
RSTMGR_CNSTY_CHK
1 1 100.00 97.52 95.05 - 100.00 - 98.41 98.31 86.21 100.00 92.31
RV_DM/USE_JTAG_INTERFACE
52 53 98.11 82.30 84.34 66.77 95.79 - 94.83 88.50 87.50 67.76 83.12
RV_TIMER
16 19 84.21 95.05 94.34 92.06 98.73 - 99.64 100.00 99.08 78.66 -
SPI_DEVICE/1R1W
31 33 93.94 87.79 93.92 74.06 95.40 - 98.86 98.16 95.91 87.29 89.36
SPI_HOST
26 26 100.00 93.13 95.03 89.08 95.27 96.96 98.76 93.35 - 88.02 100.00
SRAM_CTRL/MAIN
28 31 90.32 95.68 95.69 93.40 97.96 96.02 96.75 94.16 - 91.84 100.00
SRAM_CTRL/RET
28 31 90.32 90.70 82.22 92.20 97.67 93.61 94.83 89.17 - 78.23 66.67
SYSRST_CTRL
26 27 96.30 86.17 92.47 71.32 94.73 - 97.17 97.37 95.46 98.63 73.72
TL_AGENT
1 1 100.00 - - - - - - - - - -
UART
26 27 96.30 80.56 92.55 52.02 97.12 - 99.48 98.14 97.90 74.67 -
USBDEV
98 100 98.00 88.03 93.45 73.35 97.29 - 98.56 97.95 94.37 96.71 79.66
XBAR_MAIN
18 18 100.00 93.64 99.06 83.51 98.34 - 100.00 100.00 96.57 99.65 -
XBAR_PERI
18 18 100.00 75.49 99.13 29.05 98.28 - 100.00 100.00 96.51 100.00 -