Simulation Results: top_earlgrey_batch_sim

 
01/09/2026 15:30:38 DVSim: v1.52.0 sha: fbc48f8 JSON Branch: master
Block Tests Coverage Summary Code Coverage
Pass Total % Overall Code Functional Assertion Block Line Branch Condition Toggle FSM
ADC_CTRL
25 25 100.00 70.71 96.80 18.56 96.76 - 99.02 98.39 94.71 100.00 91.89
AES/MASKED
29 32 90.62 88.52 93.53 73.80 98.23 94.17 95.84 86.97 - 97.99 93.33
AES/UNMASKED
27 32 84.38 87.05 89.62 73.80 97.73 89.33 91.75 79.87 - 97.99 88.89
ALERT_HANDLER
23 26 88.46 91.38 92.16 83.74 98.24 - 99.70 98.99 92.67 92.04 77.42
AON_TIMER
23 23 100.00 96.02 99.15 90.81 98.10 - 99.09 98.56 98.93 100.00 -
CHIP
249 308 80.84 67.51 71.85 35.15 95.53 - 89.48 91.80 84.97 59.69 33.33
CLKMGR
24 27 88.89 91.66 97.13 84.91 92.94 - 98.62 98.02 89.83 99.19 100.00
CSRNG
18 19 94.74 89.46 92.38 81.01 94.98 97.05 97.69 92.68 - 93.44 85.71
EDN/EDN0
21 21 100.00 84.03 80.30 76.79 95.01 - 97.17 89.96 83.69 81.74 48.92
EDN/EDN1
21 21 100.00 87.26 83.78 79.83 98.18 - 98.03 92.86 88.00 94.54 45.45
ENTROPY_SRC/RNG_4BITS
21 23 91.30 75.08 88.28 52.72 84.24 94.49 97.16 86.75 - 76.51 92.71
GPIO
24 27 88.89 96.60 92.95 100.00 96.84 - 98.93 99.01 98.27 75.61 -
HMAC
28 28 100.00 75.66 86.43 43.16 97.38 - 99.54 99.02 96.25 46.17 91.18
I2C
44 50 88.00 84.73 78.19 78.54 97.46 - 96.41 92.33 84.63 73.52 44.05
KEYMGR_DPE/EARLGREY
12 14 85.71 64.68 82.24 14.60 97.21 - 97.35 93.77 86.00 58.42 75.68
KMAC/MASKED
29 40 72.50 80.04 65.98 80.06 94.09 - 97.14 89.96 83.68 23.02 36.08
KMAC/UNMASKED
29 40 72.50 78.85 63.76 78.49 94.31 - 95.53 88.06 83.07 21.49 30.66
LC_CTRL/VOLATILE_UNLOCK_DISABLED
38 39 97.44 90.28 83.70 93.01 94.13 - 97.20 93.76 79.52 84.46 63.55
LC_CTRL/VOLATILE_UNLOCK_ENABLED
38 39 97.44 90.42 83.93 92.65 94.69 - 97.17 93.57 79.42 85.92 63.55
OTBN
39 42 92.86 89.64 81.81 97.46 89.66 97.71 97.94 81.66 - 81.43 66.20
OTP_CTRL
27 30 90.00 81.93 79.03 72.38 94.38 - 88.52 83.41 90.33 87.25 45.66
PRIM_ALERT
5 5 100.00 90.05 94.05 - 86.05 - 100.00 95.83 95.83 100.00 78.57
PRIM_ESC
1 1 100.00 85.47 85.75 - 85.19 - 90.83 80.00 82.93 100.00 75.00
PRIM_LFSR
4 4 100.00 97.07 99.14 - 95.00 - 100.00 100.00 96.55 100.00 -
PRIM_PRESENT
1 1 100.00 89.63 79.26 - 100.00 - 90.41 75.00 75.00 76.63 -
PRIM_PRINCE
1 1 100.00 100.00 100.00 - 100.00 - 100.00 100.00 100.00 100.00 -
PWRMGR
25 29 86.21 96.07 94.43 96.38 97.39 - 98.93 95.62 93.78 89.83 94.00
ROM_CTRL/192KB
17 19 89.47 92.29 87.88 91.61 97.39 - 97.63 97.83 95.70 94.93 53.33
RSTMGR
19 19 100.00 96.58 99.17 92.04 98.53 - 99.51 99.83 98.33 99.00 -
RSTMGR_CNSTY_CHK
1 1 100.00 97.81 95.61 - 100.00 - 98.46 98.39 88.89 100.00 92.31
RV_DM/USE_JTAG_INTERFACE
50 53 94.34 74.74 83.83 44.59 95.79 - 94.25 86.75 86.53 68.51 83.12
RV_TIMER
18 19 94.74 95.93 94.66 94.71 98.41 - 100.00 100.00 100.00 78.66 -
SPI_DEVICE/1R1W
31 33 93.94 85.57 91.31 69.99 95.40 - 98.84 98.11 95.96 74.30 89.36
SPI_HOST
26 26 100.00 91.74 91.30 88.66 95.27 96.96 98.76 93.35 - 73.07 100.00
SRAM_CTRL/MAIN
29 31 93.55 95.06 95.09 92.80 97.28 94.48 95.64 92.86 - 91.84 100.00
SRAM_CTRL/RET
28 31 90.32 90.99 81.50 93.40 98.08 91.85 93.41 87.60 - 78.32 66.67
SYSRST_CTRL
25 27 92.59 83.21 93.20 61.34 95.08 - 97.36 97.48 95.51 100.00 75.64
TL_AGENT
1 1 100.00 - - - - - - - - - -
UART
26 27 96.30 83.76 92.55 60.16 98.56 - 99.48 98.14 97.90 74.67 -
USBDEV
97 100 97.00 87.88 93.73 72.62 97.29 - 98.56 97.87 94.13 96.71 81.36
XBAR_MAIN
18 18 100.00 85.83 99.13 60.34 98.02 - 100.00 100.00 97.14 99.37 -
XBAR_PERI
18 18 100.00 78.28 99.13 37.74 97.98 - 100.00 100.00 96.51 100.00 -