Simulation Results: top_earlgrey_batch_sim

 
10/09/2026 17:06:13 DVSim: v1.52.2 sha: 5bf9391 JSON Branch: master
Block Tests Coverage Summary Code Coverage
Pass Total % Overall Code Functional Assertion Block Line Branch Condition Toggle FSM
ADC_CTRL
24 25 96.00 70.96 97.36 18.59 96.92 - 99.02 98.45 94.75 100.00 94.59
AES/MASKED
29 32 90.62 88.46 94.12 73.04 98.23 94.22 95.73 87.20 - 97.99 95.56
AES/UNMASKED
30 32 93.75 88.02 90.23 76.10 97.73 90.19 92.55 81.48 - 97.99 88.89
ALERT_HANDLER
24 26 92.31 90.45 93.16 80.14 98.06 - 99.74 98.01 91.43 92.73 83.87
AON_TIMER
23 23 100.00 96.00 99.09 90.81 98.10 - 99.09 98.56 98.69 100.00 -
CHIP
250 308 81.17 73.19 75.86 46.98 96.74 - 93.78 93.35 88.65 70.21 33.33
CLKMGR
27 27 100.00 92.99 98.47 86.28 94.21 - 99.14 98.96 94.56 99.68 100.00
CSRNG
18 19 94.74 89.51 92.13 81.85 94.54 96.73 97.56 91.88 - 93.37 85.71
EDN/EDN0
21 21 100.00 85.94 81.16 80.36 96.31 - 97.72 91.35 85.61 75.73 55.38
EDN/EDN1
21 21 100.00 87.31 83.71 80.04 98.18 - 98.18 92.86 89.08 93.00 45.45
ENTROPY_SRC/RNG_4BITS
22 23 95.65 75.62 88.41 53.40 85.06 94.47 97.19 86.64 - 76.07 93.75
GPIO
25 27 92.59 96.96 94.05 100.00 96.84 - 99.76 99.80 98.41 78.21 -
HMAC
28 28 100.00 75.91 86.45 44.12 97.16 - 99.59 99.19 96.14 46.17 91.18
I2C
42 50 84.00 85.99 78.38 82.56 97.04 - 96.38 92.33 85.12 74.04 44.05
KEYMGR_DPE/EARLGREY
12 14 85.71 65.09 82.44 15.15 97.67 - 97.19 93.77 86.34 59.23 75.68
KMAC/MASKED
29 40 72.50 80.09 65.82 81.19 93.25 - 97.09 89.84 84.31 23.06 34.81
KMAC/UNMASKED
29 40 72.50 78.70 63.89 78.63 93.58 - 95.56 88.36 83.36 21.49 30.66
LC_CTRL/VOLATILE_UNLOCK_DISABLED
38 39 97.44 90.47 83.35 93.37 94.69 - 97.15 93.47 79.31 83.27 63.55
LC_CTRL/VOLATILE_UNLOCK_ENABLED
38 39 97.44 90.12 83.33 92.47 94.55 - 97.17 93.57 79.22 84.99 61.68
OTBN
39 45 86.67 91.10 86.08 97.46 89.76 99.22 99.42 94.38 - 84.31 66.20
OTP_CTRL
21 30 70.00 76.48 72.86 64.06 92.53 - 87.58 80.50 88.18 70.01 38.02
PRIM_ALERT
5 5 100.00 90.61 95.18 - 86.05 - 100.00 95.83 97.92 100.00 82.14
PRIM_ESC
1 1 100.00 83.86 82.54 - 85.19 - 88.99 77.78 78.05 100.00 67.86
PRIM_LFSR
4 4 100.00 97.07 99.14 - 95.00 - 100.00 100.00 96.55 100.00 -
PRIM_PRESENT
1 1 100.00 89.63 79.26 - 100.00 - 90.41 75.00 75.00 76.63 -
PRIM_PRINCE
1 1 100.00 100.00 100.00 - 100.00 - 100.00 100.00 100.00 100.00 -
PWRMGR
24 29 82.76 95.98 92.96 96.54 98.43 - 99.09 96.38 95.90 99.44 74.00
ROM_CTRL/192KB
18 19 94.74 95.63 92.87 97.36 96.66 - 98.95 98.56 98.52 95.00 73.33
RSTMGR
19 19 100.00 97.46 99.20 94.53 98.66 - 99.51 99.83 98.40 99.08 -
RSTMGR_CNSTY_CHK
1 1 100.00 97.81 95.61 - 100.00 - 98.46 98.39 88.89 100.00 92.31
RV_DM/USE_JTAG_INTERFACE
51 53 96.23 83.43 84.91 69.58 95.79 - 94.67 87.91 87.64 69.93 84.42
RV_TIMER
17 19 89.47 96.28 94.26 96.18 98.41 - 100.00 100.00 100.00 77.03 -
SPI_DEVICE/1R1W
31 33 93.94 86.52 91.25 72.92 95.40 - 98.86 98.13 95.58 74.30 89.36
SPI_HOST
25 26 96.15 91.42 91.30 88.24 94.71 96.96 98.76 93.35 - 73.07 100.00
SRAM_CTRL/MAIN
29 31 93.55 95.92 95.06 94.60 98.10 94.48 95.64 92.86 - 91.75 100.00
SRAM_CTRL/RET
28 31 90.32 90.19 80.83 91.80 97.95 91.03 92.28 86.03 - 78.32 66.67
SYSRST_CTRL
25 27 92.59 83.43 92.36 64.37 93.56 - 96.89 97.22 94.18 99.77 73.72
TL_AGENT
1 1 100.00 - - - - - - - - - -
UART
26 27 96.30 82.41 90.71 59.41 97.12 - 98.86 96.50 93.00 74.49 -
USBDEV
98 100 98.00 87.92 93.84 72.62 97.29 - 98.56 97.87 94.38 97.03 81.36
XBAR_MAIN
18 18 100.00 78.81 99.09 39.22 98.12 - 100.00 100.00 96.97 99.37 -
XBAR_PERI
18 18 100.00 75.82 99.13 29.90 98.43 - 100.00 100.00 96.51 100.00 -