Simulation Results

Block	Tests			Coverage Summary				Code Coverage
Block	Pass	Total	%	Overall	Code	Functional	Assertion	Block	Line	Branch	Condition	Toggle	FSM
ADC_CTRL	217	233	93.13	71.60	98.53	19.34	96.92	-	99.05	98.51	95.08	100.00	100.00
AES/MASKED	1009	1110	90.90	97.42	96.55	97.32	98.38	96.88	97.79	92.65	-	97.99	97.78
AES/UNMASKED	990	1110	89.19	95.77	93.00	96.37	97.92	93.91	95.23	87.69	-	97.99	91.11
ALERT_HANDLER	517	593	87.18	99.05	98.93	99.32	98.89	-	99.99	99.99	97.55	97.12	100.00
AON_TIMER	178	180	98.89	99.09	99.17	100.00	98.10	-	99.09	98.56	99.05	100.00	-
CHIP	1679	1945	86.32	90.97	77.26	98.32	97.34	-	94.04	94.30	92.71	71.91	33.33
CLKMGR	271	273	99.27	94.39	98.87	87.82	96.47	-	99.29	99.06	95.98	100.00	100.00
CSRNG	1393	1403	99.29	94.91	96.24	91.32	97.16	98.59	99.54	96.55	-	93.64	95.24
EDN/EDN0	686	688	99.71	95.38	94.99	92.66	98.48	-	98.86	96.23	93.56	97.07	89.25
EDN/EDN1	688	688	100.00	95.57	96.09	92.44	98.18	-	98.48	94.59	94.69	96.08	96.59
ENTROPY_SRC/RNG_4BITS	2311	2453	94.21	90.99	90.54	92.45	89.98	95.18	97.82	88.06	-	79.40	96.88
GPIO	231	253	91.30	97.78	94.91	100.00	98.42	-	99.76	99.80	99.57	80.52	-
HMAC	692	694	99.71	95.14	88.30	99.52	97.60	-	99.64	99.35	96.36	46.17	100.00
I2C	582	755	77.09	89.16	80.37	89.64	97.46	-	97.25	93.75	89.18	74.04	47.62
KEYMGR_DPE/EARLGREY	102	143	71.33	65.64	82.87	16.37	97.67	-	97.60	93.77	87.82	59.49	75.68
KMAC/MASKED	313	540	57.96	83.26	69.55	84.30	95.92	-	97.78	91.84	88.84	28.79	40.51
KMAC/UNMASKED	310	540	57.41	80.53	64.81	82.34	94.45	-	95.80	89.42	86.62	21.54	30.66
LC_CTRL/VOLATILE_UNLOCK_DISABLED	494	523	94.46	92.31	85.89	96.06	94.97	-	97.28	93.90	81.70	88.33	68.22
LC_CTRL/VOLATILE_UNLOCK_ENABLED	494	523	94.46	92.22	85.76	96.06	94.83	-	97.26	94.00	81.90	88.33	67.29
OTBN	421	443	95.03	94.67	86.96	100.00	97.06	99.32	99.53	95.03	-	85.66	67.61
OTP_CTRL	622	903	68.88	90.63	85.30	91.11	95.47	-	90.18	86.61	93.93	92.57	63.19
PRIM_ALERT	58	60	96.67	90.97	95.89	-	86.05	-	100.00	95.83	97.92	100.00	85.71
PRIM_ESC	20	20	100.00	89.45	93.71	-	85.19	-	95.41	88.89	87.80	100.00	96.43
PRIM_LFSR	4	4	100.00	97.07	99.14	-	95.00	-	100.00	100.00	96.55	100.00	-
PRIM_PRESENT	1	1	100.00	89.63	79.26	-	100.00	-	90.41	75.00	75.00	76.63	-
PRIM_PRINCE	10	10	100.00	100.00	100.00	-	100.00	-	100.00	100.00	100.00	100.00	-
PWRMGR	216	273	79.12	98.48	97.48	99.01	98.96	-	99.09	96.38	96.32	99.62	96.00
ROM_CTRL/192KB	152	156	97.44	98.38	98.63	99.28	97.24	-	99.21	99.64	98.96	95.34	100.00
RSTMGR	147	148	99.32	99.12	99.66	98.76	98.93	-	99.51	99.83	99.31	100.00	-
RSTMGR_CNSTY_CHK	9	10	90.00	97.81	95.61	-	100.00	-	98.46	98.39	88.89	100.00	92.31
RV_DM/USE_JTAG_INTERFACE	321	368	87.23	77.71	88.86	48.40	95.87	-	96.20	89.74	90.56	71.71	96.10
RV_TIMER	205	223	91.93	97.60	94.66	99.41	98.73	-	100.00	100.00	100.00	78.66	-
SPI_DEVICE/1R1W	393	416	94.47	95.34	91.48	99.01	95.52	-	98.90	98.27	96.56	74.30	89.36
SPI_HOST	219	220	99.55	92.76	91.30	90.76	96.22	96.96	98.76	93.35	-	73.07	100.00
SRAM_CTRL/MAIN	231	248	93.15	96.59	95.09	96.60	98.10	94.48	95.64	92.86	-	91.84	100.00
SRAM_CTRL/RET	230	248	92.74	92.14	81.75	96.60	98.08	92.19	93.78	88.23	-	78.32	66.67
SYSRST_CTRL	361	410	88.05	93.81	98.02	84.83	98.58	-	99.27	99.30	97.93	100.00	93.59
TL_AGENT	10	10	100.00	-	-	-	-	-	-	-	-	-	-
UART	439	453	96.91	96.83	92.64	99.30	98.56	-	99.48	98.14	98.25	74.67	-
USBDEV	1753	1780	98.48	97.64	96.89	98.73	97.29	-	98.80	98.26	95.44	97.03	94.92
XBAR_MAIN	450	450	100.00	99.30	99.16	100.00	98.74	-	100.00	100.00	97.28	99.37	-
XBAR_PERI	450	450	100.00	99.52	99.19	99.89	99.49	-	100.00	100.00	96.78	100.00	-

Simulation Results: top_earlgrey_batch_sim