Simulation Results: top_earlgrey_batch_sim

 
20/04/2026 17:21:27 DVSim: v1.32.0 sha: 8666f0e json Branch: master
Block Tests Coverage Summary Code Coverage
Pass Total % Overall Code Functional Assertion Block Line Branch Condition Toggle FSM
ADC_CTRL
15 25 60.00 65.40 92.09 13.02 91.09 - 97.97 96.35 85.77 99.29 81.08
AES/MASKED
34 35 97.14 87.42 95.33 68.50 98.43 96.00 97.71 90.08 - 98.05 95.48
AES/UNMASKED
34 35 97.14 85.28 91.89 66.20 97.75 91.48 93.70 84.40 - 97.99 91.49
ALERT_HANDLER
25 26 96.15 90.07 93.10 78.69 98.42 - 99.77 97.92 91.07 94.48 82.26
AON_TIMER
23 23 100.00 95.87 98.81 92.13 96.67 - 99.09 98.56 99.05 98.53 -
CHIP
256 328 78.05 76.32 84.58 47.01 97.37 - 93.91 92.32 88.32 91.20 57.14
CLKMGR
26 27 96.30 92.90 98.09 85.42 95.20 - 98.97 98.62 93.65 99.19 100.00
CSRNG
17 19 89.47 77.02 89.70 48.77 92.58 95.44 96.02 89.05 - 88.03 85.71
EDN/EDN0
21 21 100.00 86.62 82.01 81.55 96.31 - 97.66 92.47 86.83 81.49 51.61
EDN/EDN1
21 21 100.00 86.83 83.11 80.25 97.14 - 98.18 93.51 89.54 87.74 46.59
ENTROPY_SRC/RNG_4BITS
20 22 90.91 73.51 86.43 51.02 83.09 94.29 97.01 85.91 - 76.33 86.46
FLASH_CTRL
79 79 100.00 95.47 94.03 95.63 96.76 - 95.92 97.03 93.55 97.93 85.71
GPIO
25 27 92.59 98.09 97.42 100.00 96.84 - 99.76 99.80 98.70 91.41 -
HMAC
28 28 100.00 79.00 96.24 44.07 96.70 - 99.23 98.02 95.73 100.00 88.24
I2C
42 50 84.00 85.00 81.34 77.48 96.19 - 96.41 92.33 84.67 89.24 44.05
KEYMGR
30 30 100.00 86.64 93.71 68.71 97.49 - 98.72 96.07 90.80 96.92 86.05
KMAC/MASKED
40 40 100.00 94.87 91.22 95.42 97.98 - 99.14 96.95 93.95 99.86 66.20
KMAC/UNMASKED
39 40 97.50 92.74 88.83 91.63 97.75 - 97.23 94.95 94.11 100.00 57.85
LC_CTRL/VOLATILE_UNLOCK_DISABLED
38 39 97.44 90.69 84.16 93.77 94.13 - 97.17 93.82 79.10 88.10 62.62
LC_CTRL/VOLATILE_UNLOCK_ENABLED
38 39 97.44 90.10 83.64 92.53 94.13 - 97.06 93.62 78.73 87.12 61.68
OTBN
40 42 95.24 93.62 94.55 97.03 89.29 99.36 99.56 92.11 - 89.09 97.44
OTP_CTRL
26 30 86.67 78.85 76.43 66.01 94.11 - 88.67 83.22 89.99 77.04 43.23
PATTGEN
15 18 83.33 95.08 98.87 89.42 96.95 100.00 100.00 100.00 - 96.61 -
PRIM_ALERT
5 5 100.00 90.76 95.47 - 86.05 - 100.00 95.83 95.83 100.00 85.71
PRIM_ESC
1 1 100.00 84.69 84.18 - 85.19 - 89.91 77.78 85.37 100.00 67.86
PRIM_LFSR
4 4 100.00 97.07 99.14 - 95.00 - 100.00 100.00 96.55 100.00 -
PRIM_PRESENT
1 1 100.00 95.88 91.76 - 100.00 - 90.41 100.00 100.00 76.63 -
PRIM_PRINCE
1 1 100.00 100.00 100.00 - 100.00 - 100.00 100.00 100.00 100.00 -
PWM
17 17 100.00 97.25 96.05 97.69 98.00 98.88 99.28 98.01 - 90.87 -
PWRMGR
25 28 89.29 95.86 94.63 96.87 96.08 - 98.92 95.42 94.77 90.02 94.00
ROM_CTRL/32KB
18 19 94.74 96.57 94.92 97.85 96.95 - 99.59 99.64 95.99 99.36 80.00
ROM_CTRL/64KB
19 19 100.00 97.39 98.00 97.37 96.80 - 99.46 99.27 97.92 100.00 93.33
RSTMGR
19 19 100.00 98.16 99.23 97.51 97.72 - 99.51 99.83 98.61 98.99 -
RSTMGR_CNSTY_CHK
1 1 100.00 97.52 95.05 - 100.00 - 98.41 98.31 86.21 100.00 92.31
RV_DM/USE_JTAG_INTERFACE
45 53 84.91 78.34 82.52 57.50 94.99 - 93.61 84.31 83.77 71.70 79.22
RV_TIMER
15 19 78.95 96.98 100.00 94.12 96.82 - 100.00 100.00 100.00 100.00 -
SPI_DEVICE/1R1W
31 33 93.94 87.71 93.33 75.15 94.64 - 99.10 98.39 96.27 83.54 89.36
SPI_DEVICE/2P
32 33 96.97 87.34 94.15 73.26 94.62 - 99.16 98.46 96.04 87.74 89.36
SPI_HOST
26 26 100.00 92.97 94.62 88.66 95.64 96.69 98.76 92.75 - 86.98 100.00
SRAM_CTRL/MAIN
29 31 93.55 95.01 95.92 92.80 96.32 94.93 95.55 92.06 - 96.09 100.00
SRAM_CTRL/RET
29 31 93.55 91.24 83.29 94.00 96.43 93.73 94.89 89.51 - 82.08 66.67
SYSRST_CTRL
26 27 96.30 82.30 90.59 66.94 89.37 - 95.72 96.40 93.54 100.00 67.31
TL_AGENT
1 1 100.00 - - - - - - - - - -
UART
27 27 100.00 81.17 95.87 50.53 97.12 - 99.17 97.44 95.33 91.55 -
USBDEV
98 100 98.00 88.88 94.38 76.07 96.20 - 98.70 98.17 94.76 97.23 83.05
XBAR_MAIN
18 18 100.00 80.32 98.98 43.95 98.04 - 100.00 100.00 95.93 100.00 -
XBAR_PERI
18 18 100.00 76.38 98.07 32.98 98.09 - 100.00 100.00 92.28 100.00 -