Simulation Results: top_earlgrey_batch_sim

 
27/07/2026 15:30:29 DVSim: v1.50.0 sha: f1870b5 JSON Branch: master
Block Tests Coverage Summary Code Coverage
Pass Total % Overall Code Functional Assertion Block Line Branch Condition Toggle FSM
ADC_CTRL
16 25 64.00 66.47 93.85 13.17 92.38 - 98.77 97.28 86.97 99.76 86.49
AES/MASKED
28 32 87.50 89.19 93.43 75.91 98.23 94.03 95.72 86.69 - 97.99 93.33
AES/UNMASKED
28 32 87.50 86.48 89.23 72.47 97.73 89.60 92.13 80.13 - 97.99 86.67
ALERT_HANDLER
23 26 88.46 88.15 90.02 76.31 98.12 - 99.70 98.16 91.54 84.88 75.81
AON_TIMER
23 23 100.00 94.99 98.93 87.93 98.10 - 99.09 98.56 98.93 99.13 -
CHIP
245 328 74.70 72.44 81.40 38.42 97.49 - 94.18 93.55 88.55 73.58 57.14
CLKMGR
26 27 96.30 93.64 98.37 86.79 95.76 - 99.02 98.64 95.02 99.19 100.00
CSRNG
16 19 84.21 83.88 92.12 65.42 94.10 96.75 97.55 91.93 - 93.31 85.71
EDN/EDN0
21 21 100.00 87.43 84.87 79.17 98.26 - 98.04 93.86 88.91 90.87 52.69
EDN/EDN1
21 21 100.00 87.41 83.05 81.51 97.66 - 98.33 93.51 89.00 87.80 46.59
ENTROPY_SRC/RNG_4BITS
21 23 91.30 75.53 88.52 54.15 83.91 94.47 97.14 86.69 - 76.51 93.75
FLASH_CTRL
79 79 100.00 95.35 93.74 95.36 96.94 - 95.90 97.08 93.58 95.76 86.39
GPIO
25 27 92.59 98.65 97.24 99.99 98.73 - 99.76 99.80 97.98 91.41 -
HMAC
28 28 100.00 79.43 97.65 43.48 97.16 - 99.59 98.68 95.84 100.00 94.12
I2C
42 50 84.00 86.11 81.81 79.49 97.04 - 96.51 92.55 85.87 89.47 44.64
KEYMGR
30 30 100.00 87.27 95.22 69.10 97.49 - 98.72 97.99 94.72 96.30 88.37
KMAC/MASKED
28 40 70.00 78.74 65.34 76.52 94.37 - 97.02 89.32 82.51 23.06 34.81
KMAC/UNMASKED
29 40 72.50 78.42 63.74 77.21 94.31 - 95.21 87.74 83.55 21.54 30.66
LC_CTRL/VOLATILE_UNLOCK_DISABLED
39 39 100.00 90.26 83.82 92.83 94.13 - 97.28 94.00 79.43 85.75 62.62
LC_CTRL/VOLATILE_UNLOCK_ENABLED
38 39 97.44 90.27 83.58 92.83 94.41 - 97.13 93.52 79.41 85.24 62.62
OTBN
41 42 97.62 89.78 81.97 97.46 89.90 97.77 97.97 82.08 - 81.62 66.20
OTP_CTRL
30 30 100.00 81.89 78.12 72.91 94.64 - 88.67 84.39 92.57 80.72 44.27
PRIM_ALERT
5 5 100.00 91.12 96.19 - 86.05 - 100.00 95.83 95.83 100.00 89.29
PRIM_ESC
1 1 100.00 84.69 84.18 - 85.19 - 89.91 77.78 85.37 100.00 67.86
PRIM_LFSR
4 4 100.00 97.07 99.14 - 95.00 - 100.00 100.00 96.55 100.00 -
PRIM_PRESENT
1 1 100.00 95.88 91.76 - 100.00 - 90.41 100.00 100.00 76.63 -
PRIM_PRINCE
1 1 100.00 100.00 100.00 - 100.00 - 100.00 100.00 100.00 100.00 -
PWRMGR
27 29 93.10 97.45 95.65 98.02 98.69 - 99.09 96.37 95.62 91.15 96.00
ROM_CTRL/32KB
0 19 0.00 - - - - - - - - - -
ROM_CTRL/64KB
0 19 0.00 - - - - - - - - - -
RSTMGR
19 19 100.00 98.25 99.28 96.52 98.93 - 99.51 99.83 98.47 99.33 -
RSTMGR_CNSTY_CHK
1 1 100.00 97.52 95.05 - 100.00 - 98.41 98.31 86.21 100.00 92.31
RV_DM/USE_JTAG_INTERFACE
52 53 98.11 77.12 84.71 51.17 95.47 - 95.20 88.50 88.19 69.83 81.82
RV_TIMER
16 19 84.21 95.59 94.66 95.29 96.82 - 100.00 100.00 100.00 78.66 -
SPI_DEVICE/1R1W
31 33 93.94 84.53 93.70 64.48 95.40 - 98.81 98.06 95.73 86.56 89.36
SPI_HOST
25 26 96.15 91.77 91.14 87.39 96.79 96.78 98.54 92.95 - 73.07 100.00
SRAM_CTRL/MAIN
28 31 90.32 95.80 95.70 94.00 97.69 96.09 96.82 94.16 - 91.84 100.00
SRAM_CTRL/RET
28 31 90.32 91.28 82.38 94.20 97.26 93.81 94.91 89.64 - 78.32 66.67
SYSRST_CTRL
27 27 100.00 82.25 94.31 56.07 96.36 - 97.88 97.96 95.15 99.77 80.77
TL_AGENT
1 1 100.00 - - - - - - - - - -
UART
25 27 92.59 83.26 91.62 59.59 98.56 - 99.17 96.97 95.68 74.67 -
USBDEV
97 100 97.00 88.15 94.17 72.98 97.29 - 98.62 98.08 94.29 96.82 83.05
XBAR_MAIN
18 18 100.00 88.79 99.03 69.36 97.99 - 100.00 100.00 96.50 99.63 -
XBAR_PERI
18 18 100.00 71.78 99.13 18.05 98.15 - 100.00 100.00 96.51 100.00 -