Simulation Results: top_earlgrey_batch_sim

 
20/08/2026 15:30:29 DVSim: v1.51.0 sha: 83fc48e JSON Branch: master
Block Tests Coverage Summary Code Coverage
Pass Total % Overall Code Functional Assertion Block Line Branch Condition Toggle FSM
ADC_CTRL
25 25 100.00 70.76 96.76 18.61 96.92 - 99.02 98.39 94.50 100.00 91.89
AES/MASKED
29 32 90.62 88.76 93.58 74.76 97.94 94.22 95.89 87.09 - 97.99 93.33
AES/UNMASKED
29 32 90.62 88.19 90.54 76.29 97.73 90.41 92.49 82.04 - 97.99 89.63
ALERT_HANDLER
25 26 96.15 89.49 90.27 80.17 98.04 - 99.61 98.50 92.63 86.43 74.19
AON_TIMER
23 23 100.00 97.77 99.15 96.06 98.10 - 99.09 98.56 98.93 100.00 -
CHIP
243 308 78.90 70.95 80.80 34.57 97.48 - 93.67 93.40 88.01 71.79 57.14
CLKMGR
24 27 88.89 91.68 97.20 84.91 92.94 - 98.67 98.12 90.00 99.19 100.00
CSRNG
16 19 84.21 82.96 92.13 63.31 93.45 96.75 97.55 92.01 - 93.24 85.71
EDN/EDN0
21 21 100.00 88.37 86.76 80.75 97.61 - 98.70 95.82 89.55 94.34 55.38
EDN/EDN1
21 21 100.00 87.36 83.14 80.25 98.70 - 97.88 92.42 88.15 95.19 42.05
ENTROPY_SRC/RNG_4BITS
21 23 91.30 76.53 88.46 57.40 83.74 94.41 97.04 86.75 - 76.31 93.75
FLASH_CTRL
69 79 87.34 94.32 92.83 95.57 94.55 - 95.91 96.67 93.51 92.35 85.71
GPIO
25 27 92.59 97.42 94.15 100.00 98.10 - 99.76 99.80 98.70 78.35 -
HMAC
28 28 100.00 75.53 86.90 42.08 97.60 - 99.64 98.86 95.69 46.17 94.12
I2C
43 50 86.00 86.61 78.66 84.14 97.04 - 96.57 92.62 87.19 74.04 42.86
KEYMGR_DPE/EARLGREY
11 14 78.57 54.72 60.20 8.86 95.10 - 92.47 83.13 74.20 43.10 8.11
KMAC/MASKED
29 40 72.50 79.95 65.56 80.20 94.09 - 97.03 89.84 83.09 23.02 34.81
KMAC/UNMASKED
29 40 72.50 79.02 64.13 78.63 94.31 - 95.56 88.59 84.36 21.49 30.66
LC_CTRL/VOLATILE_UNLOCK_DISABLED
37 39 94.87 89.90 83.02 92.83 93.85 - 97.15 93.47 78.89 82.97 62.62
LC_CTRL/VOLATILE_UNLOCK_ENABLED
39 39 100.00 90.40 84.05 93.01 94.13 - 97.26 93.86 79.90 85.68 63.55
OTBN
42 42 100.00 90.11 82.00 98.31 90.00 97.78 97.97 82.19 - 81.66 66.20
OTP_CTRL
27 30 90.00 82.83 78.84 75.45 94.19 - 88.53 83.44 90.44 87.18 44.62
PRIM_ALERT
4 5 80.00 90.55 95.06 - 86.05 - 100.00 95.83 93.75 100.00 85.71
PRIM_ESC
1 1 100.00 84.11 83.02 - 85.19 - 88.99 77.78 80.49 100.00 67.86
PRIM_LFSR
4 4 100.00 97.07 99.14 - 95.00 - 100.00 100.00 96.55 100.00 -
PRIM_PRESENT
1 1 100.00 89.63 79.26 - 100.00 - 90.41 75.00 75.00 76.63 -
PRIM_PRINCE
1 1 100.00 100.00 100.00 - 100.00 - 100.00 100.00 100.00 100.00 -
PWRMGR
23 29 79.31 96.07 94.55 96.54 97.13 - 98.93 95.62 94.20 90.02 94.00
ROM_CTRL/32KB
18 19 94.74 96.22 94.12 96.87 97.68 - 98.94 98.55 97.77 95.33 80.00
ROM_CTRL/64KB
18 19 94.74 95.74 92.78 97.35 97.10 - 98.94 98.55 97.77 95.29 73.33
RSTMGR
19 19 100.00 97.76 99.10 95.52 98.66 - 99.51 99.83 98.06 98.99 -
RSTMGR_CNSTY_CHK
1 1 100.00 97.81 95.61 - 100.00 - 98.46 98.39 88.89 100.00 92.31
RV_DM/USE_JTAG_INTERFACE
50 53 94.34 74.89 84.90 43.98 95.79 - 95.51 87.75 87.78 69.02 84.42
RV_TIMER
17 19 89.47 96.12 94.66 95.29 98.41 - 100.00 100.00 100.00 78.66 -
SPI_DEVICE/1R1W
31 33 93.94 85.93 91.17 71.23 95.40 - 98.83 98.08 95.44 74.14 89.36
SPI_HOST
26 26 100.00 91.32 91.30 87.39 95.27 96.96 98.76 93.35 - 73.07 100.00
SRAM_CTRL/MAIN
29 31 93.55 95.55 95.09 94.00 97.55 94.48 95.64 92.86 - 91.84 100.00
SRAM_CTRL/RET
29 31 93.55 90.20 81.75 91.60 97.26 92.19 93.78 88.23 - 78.32 66.67
SYSRST_CTRL
26 27 96.30 82.47 92.19 63.56 91.67 - 96.58 97.07 94.23 100.00 73.08
TL_AGENT
1 1 100.00 - - - - - - - - - -
UART
26 27 96.30 79.34 91.80 47.37 98.85 - 99.17 96.74 96.62 74.67 -
USBDEV
97 100 97.00 89.08 94.51 75.61 97.11 - 98.66 98.00 94.10 97.03 84.75
XBAR_MAIN
18 18 100.00 84.64 99.19 56.79 97.95 - 100.00 100.00 97.12 99.66 -
XBAR_PERI
18 18 100.00 79.67 99.13 41.73 98.16 - 100.00 100.00 96.51 100.00 -