Simulation Results: top_earlgrey_batch_sim

 
31/08/2026 15:30:34 DVSim: v1.52.0 sha: 6fb6d8a JSON Branch: master
Block Tests Coverage Summary Code Coverage
Pass Total % Overall Code Functional Assertion Block Line Branch Condition Toggle FSM
ADC_CTRL
25 25 100.00 70.48 96.27 18.56 96.60 - 99.05 98.51 94.62 100.00 89.19
AES/MASKED
27 32 84.38 87.92 94.05 71.32 98.38 94.02 95.68 86.97 - 97.99 95.56
AES/UNMASKED
28 32 87.50 87.54 89.55 75.33 97.73 89.29 91.57 79.76 - 97.99 88.89
ALERT_HANDLER
23 26 88.46 90.23 91.96 81.42 97.32 - 99.72 98.44 91.69 90.91 79.03
AON_TIMER
23 23 100.00 97.49 99.09 95.28 98.10 - 99.09 98.56 98.69 100.00 -
CHIP
251 308 81.49 72.82 76.02 45.71 96.74 - 93.90 93.41 89.12 70.34 33.33
CLKMGR
25 27 92.59 92.04 97.72 84.91 93.50 - 98.86 98.64 92.07 99.03 100.00
CSRNG
18 19 94.74 88.88 92.14 80.19 94.32 96.89 97.62 92.26 - 92.97 85.71
EDN/EDN0
21 21 100.00 83.75 77.11 79.56 94.58 - 96.20 86.89 83.98 70.61 47.85
EDN/EDN1
21 21 100.00 87.75 84.45 80.88 97.92 - 98.41 93.72 89.46 94.09 46.59
ENTROPY_SRC/RNG_4BITS
22 23 95.65 76.53 87.74 56.79 85.06 94.30 96.96 86.42 - 75.92 91.67
GPIO
25 27 92.59 96.97 94.34 99.74 96.84 - 99.76 99.80 98.99 78.79 -
HMAC
28 28 100.00 75.89 86.90 43.16 97.60 - 99.64 98.86 95.69 46.17 94.12
I2C
44 50 88.00 85.59 78.24 81.29 97.25 - 96.35 92.19 85.16 74.04 43.45
KEYMGR_DPE/EARLGREY
12 14 85.71 65.02 82.37 15.02 97.67 - 97.48 93.58 85.91 59.20 75.68
KMAC/MASKED
28 40 70.00 80.45 66.05 82.04 93.25 - 97.16 90.02 83.91 23.06 36.08
KMAC/UNMASKED
29 40 72.50 79.29 63.80 79.63 94.45 - 95.62 88.51 82.73 21.49 30.66
LC_CTRL/VOLATILE_UNLOCK_DISABLED
38 39 97.44 89.77 83.59 91.58 94.13 - 97.24 93.61 79.38 86.05 61.68
LC_CTRL/VOLATILE_UNLOCK_ENABLED
38 39 97.44 90.68 84.19 93.73 94.13 - 97.26 93.86 79.97 84.43 65.42
OTBN
41 42 97.62 91.23 86.04 97.88 89.76 99.22 99.44 94.34 - 84.17 66.20
OTP_CTRL
28 30 93.33 82.94 78.26 76.36 94.19 - 88.52 83.51 90.52 82.92 45.83
PRIM_ALERT
5 5 100.00 90.20 94.34 - 86.05 - 100.00 95.83 93.75 100.00 82.14
PRIM_ESC
1 1 100.00 84.35 83.51 - 85.19 - 88.99 77.78 82.93 100.00 67.86
PRIM_LFSR
4 4 100.00 97.07 99.14 - 95.00 - 100.00 100.00 96.55 100.00 -
PRIM_PRESENT
1 1 100.00 89.63 79.26 - 100.00 - 90.41 75.00 75.00 76.63 -
PRIM_PRINCE
1 1 100.00 100.00 100.00 - 100.00 - 100.00 100.00 100.00 100.00 -
PWRMGR
24 29 82.76 95.82 94.50 95.06 97.91 - 98.93 95.62 93.92 90.02 94.00
ROM_CTRL/192KB
18 19 94.74 95.56 92.66 96.64 97.39 - 98.82 98.19 98.22 94.76 73.33
RSTMGR
19 19 100.00 97.55 99.34 94.78 98.53 - 99.51 99.83 98.75 99.25 -
RSTMGR_CNSTY_CHK
1 1 100.00 97.81 95.61 - 100.00 - 98.46 98.39 88.89 100.00 92.31
RV_DM/USE_JTAG_INTERFACE
50 53 94.34 75.07 84.72 44.70 95.79 - 94.88 87.58 87.78 68.93 84.42
RV_TIMER
17 19 89.47 96.51 94.36 96.76 98.41 - 100.00 100.00 100.00 77.44 -
SPI_DEVICE/1R1W
31 33 93.94 86.18 91.38 71.88 95.27 - 98.89 98.22 96.12 74.30 89.36
SPI_HOST
26 26 100.00 91.46 91.25 88.24 94.90 96.96 98.76 93.35 - 72.90 100.00
SRAM_CTRL/MAIN
29 31 93.55 95.48 94.15 95.00 97.28 93.33 94.31 90.58 - 91.70 100.00
SRAM_CTRL/RET
29 31 93.55 90.90 81.35 93.40 97.95 91.78 93.41 87.44 - 77.89 66.67
SYSRST_CTRL
27 27 100.00 84.67 94.40 63.21 96.40 - 98.21 98.11 95.56 100.00 80.13
TL_AGENT
1 1 100.00 - - - - - - - - - -
UART
25 27 92.59 81.97 91.35 56.29 98.27 - 99.06 96.97 94.87 74.49 -
USBDEV
98 100 98.00 88.58 94.57 73.89 97.29 - 98.68 98.05 94.43 96.92 84.75
XBAR_MAIN
18 18 100.00 87.74 99.10 65.84 98.28 - 100.00 100.00 97.03 99.37 -
XBAR_PERI
18 18 100.00 79.69 99.13 41.80 98.13 - 100.00 100.00 96.51 100.00 -