Simulation Results: top_earlgrey_batch_sim

 
30/03/2026 17:32:01 DVSim: v1.17.3 sha: 554040f json Branch: master
Block Tests Coverage Summary Code Coverage
Pass Total % Overall Code Functional Assertion Block Line Branch Condition Toggle FSM
ADC_CTRL
25 25 100.00 70.25 96.83 18.14 95.79 - 99.05 97.71 92.80 100.00 94.59
AES/MASKED
34 35 97.14 87.23 95.36 68.04 98.29 95.86 97.61 89.66 - 98.05 96.13
AES/UNMASKED
34 35 97.14 85.83 91.37 68.36 97.75 91.68 94.10 84.81 - 97.90 88.65
ALERT_HANDLER
26 26 100.00 89.42 92.59 77.72 97.95 - 99.66 98.88 93.22 93.77 77.42
AON_TIMER
23 23 100.00 94.85 98.63 89.24 96.67 - 99.09 98.56 98.45 98.41 -
CHIP
264 326 80.98 73.16 85.04 37.06 97.37 - 94.25 93.56 89.03 91.20 57.14
CLKMGR
25 27 92.59 92.93 98.23 85.08 95.48 - 98.97 98.57 94.44 99.19 100.00
CSRNG
19 19 100.00 89.55 92.30 83.12 93.23 97.01 97.69 92.50 - 93.31 85.71
EDN/EDN0
21 21 100.00 85.28 80.87 79.96 95.01 - 97.28 90.52 84.79 82.32 49.46
EDN/EDN1
21 21 100.00 87.15 84.91 79.41 97.14 - 98.18 93.51 89.31 95.83 47.73
ENTROPY_SRC/RNG_4BITS
22 22 100.00 76.40 89.68 56.18 83.33 94.97 97.88 87.68 - 76.27 96.88
FLASH_CTRL
77 79 97.47 95.59 94.12 95.88 96.76 - 95.97 97.14 93.61 98.17 85.71
GPIO
25 27 92.59 98.07 97.36 100.00 96.84 - 99.76 99.80 98.13 91.75 -
HMAC
28 28 100.00 78.70 96.90 42.51 96.70 - 99.59 98.68 95.05 100.00 91.18
I2C
43 50 86.00 85.99 81.76 80.23 95.98 - 96.69 92.76 86.47 89.45 43.45
KEYMGR
30 30 100.00 83.66 94.34 59.16 97.49 - 98.68 97.53 94.68 97.07 83.72
KMAC/MASKED
40 40 100.00 94.53 91.06 94.56 97.98 - 99.07 96.89 93.49 99.65 66.20
KMAC/UNMASKED
39 40 97.50 93.01 88.63 92.50 97.90 - 97.43 95.20 90.30 99.87 60.33
LC_CTRL/VOLATILE_UNLOCK_DISABLED
39 39 100.00 90.50 84.32 93.06 94.13 - 97.21 93.97 79.59 88.21 62.62
LC_CTRL/VOLATILE_UNLOCK_ENABLED
37 39 94.87 90.10 83.81 92.35 94.13 - 97.06 93.62 79.21 86.55 62.62
OTBN
39 42 92.86 93.77 95.21 96.61 89.50 99.37 99.56 91.92 - 91.91 97.44
OTP_CTRL
25 30 83.33 79.38 76.03 68.12 93.99 - 88.62 83.26 90.13 75.76 42.36
PATTGEN
16 18 88.89 95.05 98.79 89.42 96.95 100.00 100.00 100.00 - 96.37 -
PRIM_ALERT
5 5 100.00 89.84 93.63 - 86.05 - 100.00 95.83 93.75 100.00 78.57
PRIM_ESC
1 1 100.00 84.56 83.92 - 85.19 - 89.91 77.78 80.49 100.00 71.43
PRIM_LFSR
4 4 100.00 97.07 99.14 - 95.00 - 100.00 100.00 96.55 100.00 -
PRIM_PRESENT
1 1 100.00 95.88 91.76 - 100.00 - 90.41 100.00 100.00 76.63 -
PRIM_PRINCE
1 1 100.00 100.00 100.00 - 100.00 - 100.00 100.00 100.00 100.00 -
PWM
17 17 100.00 97.60 96.12 98.68 98.00 98.98 99.28 98.21 - 90.87 -
PWRMGR
22 28 78.57 94.20 89.99 96.54 96.08 - 98.92 95.42 93.78 89.83 72.00
ROM_CTRL/32KB
19 19 100.00 97.34 99.52 95.70 96.80 - 99.59 99.64 98.37 100.00 100.00
ROM_CTRL/64KB
19 19 100.00 97.30 97.97 97.14 96.80 - 99.46 99.27 98.07 99.72 93.33
RSTMGR
19 19 100.00 97.29 99.36 94.53 97.99 - 99.51 99.83 98.75 99.33 -
RSTMGR_CNSTY_CHK
1 1 100.00 97.52 95.05 - 100.00 - 98.41 98.31 86.21 100.00 92.31
RV_DM/USE_JTAG_INTERFACE
47 53 88.68 76.94 83.92 51.59 95.31 - 94.57 85.69 84.74 72.79 81.82
RV_TIMER
16 19 84.21 97.86 100.00 96.76 96.82 - 100.00 100.00 100.00 100.00 -
SPI_DEVICE/1R1W
31 33 93.94 83.78 93.20 70.49 87.66 - 99.05 98.27 96.12 83.19 89.36
SPI_DEVICE/2P
33 33 100.00 87.19 94.04 72.92 94.62 - 99.14 98.42 95.73 87.57 89.36
SPI_HOST
26 26 100.00 92.61 95.03 88.66 94.13 96.96 98.76 93.35 - 88.02 100.00
SRAM_CTRL/MAIN
30 31 96.77 94.18 91.36 95.36 95.83 - 97.94 95.54 91.68 90.71 80.95
SRAM_CTRL/RET
30 31 96.77 93.38 89.46 95.18 95.51 - 97.49 95.20 92.53 90.66 71.43
SYSRST_CTRL
27 27 100.00 82.14 92.39 60.55 93.49 - 97.17 97.33 94.39 100.00 73.08
TL_AGENT
1 1 100.00 - - - - - - - - - -
UART
25 27 92.59 82.01 95.76 53.15 97.12 - 99.06 96.97 95.45 91.55 -
USBDEV
97 100 97.00 87.08 93.70 71.35 96.20 - 98.60 98.00 93.95 96.60 81.36
XBAR_MAIN
18 18 100.00 87.80 98.98 66.61 97.82 - 100.00 100.00 95.91 100.00 -
XBAR_PERI
18 18 100.00 80.92 98.41 46.20 98.17 - 100.00 100.00 93.62 100.00 -