Simulation Results: top_earlgrey_batch_sim

 
08/04/2026 18:06:49 DVSim: v1.17.3 sha: 007b0cf json Branch: master
Block Tests Coverage Summary Code Coverage
Pass Total % Overall Code Functional Assertion Block Line Branch Condition Toggle FSM
ADC_CTRL
25 25 100.00 70.28 96.88 18.34 95.62 - 99.05 97.77 93.01 100.00 94.59
AES/MASKED
34 35 97.14 86.38 95.14 65.44 98.57 95.81 97.52 89.52 - 98.05 95.48
AES/UNMASKED
34 35 97.14 85.90 90.97 68.98 97.75 91.16 93.47 83.75 - 97.99 88.65
ALERT_HANDLER
26 26 100.00 91.56 93.41 83.04 98.23 - 99.75 98.31 91.85 93.26 83.87
AON_TIMER
23 23 100.00 95.60 98.78 91.34 96.67 - 99.09 98.56 98.93 98.53 -
CHIP
268 326 82.21 76.30 85.09 46.44 97.37 - 94.25 93.63 89.13 91.29 57.14
CLKMGR
25 27 92.59 92.85 98.22 84.56 95.76 - 98.99 98.57 94.36 99.19 100.00
CSRNG
18 19 94.74 85.53 92.48 70.22 93.89 97.18 97.87 92.92 - 93.44 85.71
EDN/EDN0
21 21 100.00 86.73 82.32 81.55 96.31 - 97.88 92.61 87.58 81.93 51.61
EDN/EDN1
21 21 100.00 86.76 84.32 79.62 96.35 - 97.88 92.64 89.23 95.25 46.59
ENTROPY_SRC/RNG_4BITS
22 22 100.00 74.97 88.16 53.02 83.74 94.64 97.34 86.79 - 75.79 92.71
FLASH_CTRL
77 79 97.47 95.65 94.47 95.73 96.76 - 96.03 97.12 93.76 97.68 87.76
GPIO
25 27 92.59 98.04 97.29 99.99 96.84 - 99.76 99.80 97.84 91.75 -
HMAC
28 28 100.00 78.80 97.20 42.51 96.70 - 99.74 99.17 95.90 100.00 91.18
I2C
43 50 86.00 86.37 81.41 81.50 96.19 - 96.35 92.12 84.86 89.66 44.05
KEYMGR
30 30 100.00 84.81 93.68 63.26 97.49 - 98.72 97.44 93.08 93.10 86.05
KMAC/MASKED
39 40 97.50 94.16 90.51 94.13 97.84 - 98.91 96.30 90.93 99.51 66.90
KMAC/UNMASKED
40 40 100.00 93.15 89.81 92.35 97.30 - 97.39 95.60 94.07 100.00 61.98
LC_CTRL/VOLATILE_UNLOCK_DISABLED
38 39 97.44 90.17 83.85 92.53 94.13 - 97.12 93.67 79.52 86.31 62.62
LC_CTRL/VOLATILE_UNLOCK_ENABLED
37 39 94.87 89.91 83.62 91.99 94.13 - 96.93 93.03 79.07 87.37 61.68
OTBN
42 42 100.00 94.35 95.47 97.88 89.71 99.40 99.57 92.49 - 92.38 97.44
OTP_CTRL
27 30 90.00 80.20 77.75 68.99 93.86 - 88.67 83.17 89.66 81.95 45.31
PATTGEN
16 18 88.89 95.08 98.87 89.42 96.95 100.00 100.00 100.00 - 96.61 -
PRIM_ALERT
5 5 100.00 90.61 95.18 - 86.05 - 100.00 95.83 97.92 100.00 82.14
PRIM_ESC
1 1 100.00 84.44 83.70 - 85.19 - 89.91 77.78 82.93 100.00 67.86
PRIM_LFSR
4 4 100.00 97.07 99.14 - 95.00 - 100.00 100.00 96.55 100.00 -
PRIM_PRESENT
1 1 100.00 95.88 91.76 - 100.00 - 90.41 100.00 100.00 76.63 -
PRIM_PRINCE
1 1 100.00 100.00 100.00 - 100.00 - 100.00 100.00 100.00 100.00 -
PWM
17 17 100.00 97.56 95.99 98.68 98.00 99.02 99.28 98.27 - 90.43 -
PWRMGR
26 28 92.86 95.82 94.41 96.71 96.34 - 98.92 95.61 93.49 90.02 94.00
ROM_CTRL/32KB
19 19 100.00 96.26 96.05 95.94 96.80 - 99.32 98.18 96.73 99.34 86.67
ROM_CTRL/64KB
19 19 100.00 97.52 98.14 97.61 96.80 - 99.59 99.27 98.51 100.00 93.33
RSTMGR
19 19 100.00 97.81 99.29 96.27 97.86 - 99.51 99.83 98.75 99.08 -
RSTMGR_CNSTY_CHK
1 1 100.00 97.52 95.05 - 100.00 - 98.41 98.31 86.21 100.00 92.31
RV_DM/USE_JTAG_INTERFACE
47 53 88.68 72.13 83.78 38.48 94.12 - 94.62 85.69 84.74 72.05 81.82
RV_TIMER
16 19 84.21 97.37 100.00 95.29 96.82 - 100.00 100.00 100.00 100.00 -
SPI_DEVICE/1R1W
31 33 93.94 86.20 93.09 70.88 94.64 - 99.04 98.21 95.65 83.19 89.36
SPI_DEVICE/2P
33 33 100.00 85.92 94.10 69.05 94.62 - 99.09 98.28 96.02 87.74 89.36
SPI_HOST
26 26 100.00 92.33 95.03 87.82 94.13 96.96 98.76 93.35 - 88.02 100.00
SRAM_CTRL/MAIN
30 31 96.77 95.96 95.49 96.47 95.92 - 99.16 97.67 91.26 89.35 100.00
SRAM_CTRL/RET
30 31 96.77 93.10 87.76 95.92 95.61 - 97.31 95.01 90.46 89.35 66.67
SYSRST_CTRL
27 27 100.00 79.52 90.47 58.64 89.46 - 95.55 96.29 93.21 100.00 67.31
TL_AGENT
1 1 100.00 - - - - - - - - - -
UART
24 27 88.89 81.08 95.61 50.51 97.12 - 99.17 97.44 94.52 91.32 -
USBDEV
97 100 97.00 87.88 94.63 72.80 96.20 - 98.74 98.21 94.22 97.23 84.75
XBAR_MAIN
18 18 100.00 84.61 98.99 57.01 97.83 - 100.00 100.00 95.96 100.00 -
XBAR_PERI
18 18 100.00 81.03 98.25 46.61 98.22 - 100.00 100.00 93.00 100.00 -