Simulation Results: top_earlgrey_batch_sim

 
09/07/2026 15:30:27 DVSim: v1.49.12 sha: 527817d JSON Branch: master
Block Tests Coverage Summary Code Coverage
Pass Total % Overall Code Functional Assertion Block Line Branch Condition Toggle FSM
ADC_CTRL
15 25 60.00 66.32 93.63 13.27 92.06 - 98.03 96.29 85.81 98.82 89.19
AES/MASKED
29 32 90.62 88.26 93.52 73.04 98.23 94.17 95.87 86.90 - 97.99 93.33
AES/UNMASKED
29 32 90.62 87.37 90.17 74.00 97.92 90.23 92.60 81.22 - 97.99 88.89
ALERT_HANDLER
23 26 88.46 88.88 89.96 78.65 98.02 - 99.65 98.30 91.00 86.65 74.19
AON_TIMER
23 23 100.00 96.11 99.15 91.08 98.10 - 99.09 98.56 98.93 100.00 -
CHIP
246 328 75.00 74.38 84.00 41.66 97.49 - 94.16 92.43 89.00 87.27 57.14
CLKMGR
25 27 92.59 93.55 98.26 86.62 95.76 - 99.00 98.59 94.52 99.19 100.00
CSRNG
17 19 89.47 84.33 91.84 66.82 94.32 96.52 97.27 91.42 - 92.97 85.71
EDN/EDN0
21 21 100.00 87.57 84.90 79.56 98.26 - 98.10 93.86 88.04 92.33 52.15
EDN/EDN1
21 21 100.00 86.81 81.10 80.88 98.44 - 97.80 92.64 89.31 87.10 38.64
ENTROPY_SRC/RNG_4BITS
21 23 91.30 76.25 88.76 55.25 84.73 94.56 97.21 86.86 - 76.18 94.79
FLASH_CTRL
77 79 97.47 94.33 93.00 95.36 94.64 - 95.88 96.62 93.31 94.84 84.35
GPIO
25 27 92.59 98.52 97.16 99.99 98.42 - 99.76 99.80 98.85 90.24 -
HMAC
28 28 100.00 79.86 97.80 44.18 97.60 - 99.74 99.17 95.96 100.00 94.12
I2C
43 50 86.00 85.61 78.81 80.55 97.46 - 96.48 92.48 85.68 74.17 45.24
KEYMGR
29 30 96.67 86.87 94.42 68.69 97.49 - 98.72 97.53 93.40 96.41 86.05
KMAC/MASKED
30 40 75.00 81.80 69.52 78.28 97.61 - 96.35 90.80 84.91 29.33 46.20
KMAC/UNMASKED
30 40 75.00 79.83 67.44 74.09 97.96 - 93.86 88.35 85.22 27.45 42.34
LC_CTRL/VOLATILE_UNLOCK_DISABLED
39 39 100.00 91.20 84.64 94.13 94.83 - 97.15 93.70 79.72 88.16 64.49
LC_CTRL/VOLATILE_UNLOCK_ENABLED
39 39 100.00 90.19 84.24 91.64 94.69 - 97.17 93.66 79.41 86.46 64.49
OTBN
38 42 90.48 87.41 80.92 93.64 87.68 97.71 97.90 81.75 - 80.64 63.38
OTP_CTRL
29 30 96.67 83.84 79.72 77.05 94.76 - 88.72 83.64 90.57 89.14 46.53
PRIM_ALERT
5 5 100.00 90.76 95.47 - 86.05 - 100.00 95.83 95.83 100.00 85.71
PRIM_ESC
1 1 100.00 85.36 85.53 - 85.19 - 90.83 80.00 85.37 100.00 71.43
PRIM_LFSR
4 4 100.00 97.07 99.14 - 95.00 - 100.00 100.00 96.55 100.00 -
PRIM_PRESENT
1 1 100.00 95.88 91.76 - 100.00 - 90.41 100.00 100.00 76.63 -
PRIM_PRINCE
1 1 100.00 100.00 100.00 - 100.00 - 100.00 100.00 100.00 100.00 -
PWRMGR
27 29 93.10 97.58 97.34 98.02 97.39 - 99.09 96.37 95.62 99.62 96.00
ROM_CTRL/32KB
18 19 94.74 97.23 97.01 97.14 97.53 - 99.33 99.27 98.07 95.05 93.33
ROM_CTRL/64KB
18 19 94.74 97.03 96.90 97.37 96.81 - 99.46 99.27 96.88 95.57 93.33
RSTMGR
19 19 100.00 97.89 99.38 95.77 98.53 - 99.51 99.83 99.17 98.99 -
RSTMGR_CNSTY_CHK
1 1 100.00 97.52 95.05 - 100.00 - 98.41 98.31 86.21 100.00 92.31
RV_DM/USE_JTAG_INTERFACE
51 53 96.23 76.48 84.45 49.35 95.63 - 94.93 88.50 88.19 68.80 81.82
RV_TIMER
15 19 78.95 98.19 99.65 96.18 98.73 - 100.00 100.00 99.38 99.22 -
SPI_DEVICE/1R1W
31 33 93.94 82.94 90.67 62.75 95.40 - 98.84 98.11 95.83 71.19 89.36
SPI_HOST
26 26 100.00 91.96 91.30 89.50 95.09 96.96 98.76 93.35 - 73.07 100.00
SRAM_CTRL/MAIN
28 31 90.32 95.07 94.93 92.60 97.69 95.03 95.65 92.23 - 91.84 100.00
SRAM_CTRL/RET
28 31 90.32 91.54 82.10 94.57 97.94 93.42 94.54 88.89 - 78.31 66.67
SYSRST_CTRL
27 27 100.00 87.94 94.00 74.02 95.79 - 97.92 97.85 96.25 99.77 78.21
TL_AGENT
1 1 100.00 - - - - - - - - - -
UART
25 27 92.59 81.93 92.31 54.62 98.85 - 99.48 97.90 97.20 74.67 -
USBDEV
98 100 98.00 88.61 93.75 74.98 97.11 - 98.64 98.13 93.82 95.11 83.05
XBAR_MAIN
18 18 100.00 85.77 99.12 60.08 98.10 - 100.00 100.00 96.50 100.00 -
XBAR_PERI
18 18 100.00 77.24 99.13 34.39 98.19 - 100.00 100.00 96.51 100.00 -