Simulation Results: top_earlgrey_batch_sim

 
20/07/2026 15:30:33 DVSim: v1.49.12 sha: 99fb7bd JSON Branch: master
Block Tests Coverage Summary Code Coverage
Pass Total % Overall Code Functional Assertion Block Line Branch Condition Toggle FSM
ADC_CTRL
16 25 64.00 65.88 92.65 13.09 91.90 - 97.97 96.23 85.53 99.76 83.78
AES/MASKED
29 32 90.62 88.79 94.70 73.42 98.23 95.08 96.04 89.23 - 97.99 95.56
AES/UNMASKED
29 32 90.62 87.99 90.15 76.10 97.73 90.42 92.04 81.67 - 97.99 88.89
ALERT_HANDLER
24 26 92.31 89.23 90.17 79.59 97.93 - 99.66 98.47 92.04 86.50 74.19
AON_TIMER
23 23 100.00 96.38 98.66 92.39 98.10 - 99.09 98.56 98.93 98.04 -
CHIP
245 328 74.70 73.78 84.19 39.79 97.37 - 94.23 93.76 89.29 86.55 57.14
CLKMGR
25 27 92.59 93.15 98.20 85.76 95.48 - 98.97 98.59 94.27 99.19 100.00
CSRNG
16 19 84.21 88.00 92.33 78.43 93.23 96.95 97.73 92.51 - 93.37 85.71
EDN/EDN0
20 21 95.24 85.08 79.73 78.97 96.53 - 97.23 90.52 84.62 77.34 48.92
EDN/EDN1
21 21 100.00 86.61 83.28 79.41 97.14 - 98.25 93.94 91.00 87.74 45.45
ENTROPY_SRC/RNG_4BITS
21 23 91.30 76.62 88.03 57.28 84.56 94.25 96.94 86.36 - 76.10 92.71
FLASH_CTRL
79 79 100.00 95.55 93.88 95.82 96.94 - 95.95 97.14 93.24 96.02 87.07
GPIO
26 27 96.30 97.71 94.41 100.00 98.73 - 99.76 99.80 97.98 80.09 -
HMAC
28 28 100.00 79.29 97.00 43.26 97.60 - 99.69 98.68 95.45 100.00 91.18
I2C
44 50 88.00 85.97 78.95 81.71 97.25 - 96.75 92.69 85.42 74.04 45.83
KEYMGR
28 30 93.33 80.51 92.40 51.65 97.49 - 98.60 97.17 92.76 87.40 86.05
KMAC/MASKED
30 40 75.00 80.94 69.03 77.18 96.62 - 95.58 90.12 87.25 29.17 43.04
KMAC/UNMASKED
30 40 75.00 78.72 66.15 73.82 96.20 - 92.84 87.20 83.14 27.43 40.15
LC_CTRL/VOLATILE_UNLOCK_DISABLED
38 39 97.44 90.62 84.12 93.06 94.69 - 97.20 93.70 79.01 87.14 63.55
LC_CTRL/VOLATILE_UNLOCK_ENABLED
38 39 97.44 89.88 83.87 91.64 94.13 - 97.09 93.23 79.06 86.44 63.55
OTBN
40 42 95.24 91.17 86.24 97.03 90.25 99.28 99.48 94.82 - 84.47 66.20
OTP_CTRL
29 30 96.67 81.35 78.82 70.59 94.63 - 88.64 84.30 92.54 82.46 46.18
PRIM_ALERT
5 5 100.00 90.76 95.47 - 86.05 - 100.00 95.83 95.83 100.00 85.71
PRIM_ESC
1 1 100.00 84.80 84.41 - 85.19 - 89.91 77.78 82.93 100.00 71.43
PRIM_LFSR
4 4 100.00 97.07 99.14 - 95.00 - 100.00 100.00 96.55 100.00 -
PRIM_PRESENT
1 1 100.00 95.88 91.76 - 100.00 - 90.41 100.00 100.00 76.63 -
PRIM_PRINCE
1 1 100.00 100.00 100.00 - 100.00 - 100.00 100.00 100.00 100.00 -
PWRMGR
27 29 93.10 96.80 95.58 96.38 98.43 - 99.09 96.37 95.47 90.96 96.00
ROM_CTRL/32KB
18 19 94.74 96.18 95.50 95.94 97.10 - 99.33 99.27 97.92 94.31 86.67
ROM_CTRL/64KB
18 19 94.74 96.62 94.38 98.09 97.39 - 99.33 99.27 98.37 94.95 80.00
RSTMGR
19 19 100.00 97.63 99.23 95.27 98.39 - 99.51 99.83 98.75 98.83 -
RSTMGR_CNSTY_CHK
1 1 100.00 97.52 95.05 - 100.00 - 98.41 98.31 86.21 100.00 92.31
RV_DM/USE_JTAG_INTERFACE
51 53 96.23 76.46 85.68 48.00 95.71 - 95.09 88.67 88.19 74.65 81.82
RV_TIMER
16 19 84.21 93.96 94.66 89.12 98.09 - 100.00 100.00 100.00 78.66 -
SPI_DEVICE/1R1W
31 33 93.94 87.01 93.90 71.73 95.40 - 98.87 98.18 95.80 87.29 89.36
SPI_HOST
26 26 100.00 91.49 91.14 88.24 95.09 96.78 98.54 92.95 - 73.07 100.00
SRAM_CTRL/MAIN
28 31 90.32 95.00 95.66 91.40 97.96 96.03 96.75 94.17 - 91.70 100.00
SRAM_CTRL/RET
26 31 83.87 91.50 82.28 94.40 97.81 93.69 94.91 89.20 - 78.32 66.67
SYSRST_CTRL
27 27 100.00 85.54 94.15 66.40 96.07 - 97.92 97.89 95.43 100.00 79.49
TL_AGENT
1 1 100.00 - - - - - - - - - -
UART
26 27 96.30 81.83 95.99 50.94 98.56 - 99.17 97.44 95.80 91.55 -
USBDEV
98 100 98.00 89.31 93.84 76.79 97.29 - 98.70 98.13 94.22 95.12 83.05
XBAR_MAIN
18 18 100.00 86.50 99.04 62.17 98.28 - 100.00 100.00 96.52 99.63 -
XBAR_PERI
18 18 100.00 75.71 99.13 29.88 98.13 - 100.00 100.00 96.51 100.00 -