Simulation Results: top_earlgrey_batch_sim

 
18/08/2026 15:30:28 DVSim: v1.50.1 sha: 2c5d921 JSON Branch: master
Instrumentation Report
Block Tests Coverage Summary Code Coverage
Pass Total % Overall Code Functional Assertion Block Line Branch Condition Toggle FSM
ADC_CTRL
25 25 100.00 71.17 97.90 19.01 96.60 - 99.02 98.45 94.71 100.00 97.30
AES/MASKED
28 32 87.50 89.35 94.68 75.14 98.23 94.99 95.96 89.31 - 97.90 95.56
AES/UNMASKED
28 32 87.50 87.78 90.09 75.53 97.73 89.85 92.26 81.22 - 97.99 88.89
ALERT_HANDLER
24 26 92.31 88.88 90.90 77.55 98.18 - 99.69 98.17 92.50 86.70 77.42
AON_TIMER
23 23 100.00 95.79 99.09 91.60 96.67 - 99.09 98.56 98.69 100.00 -
CHIP
0 326 0.00 - - - - - - - - - -
CLKMGR
25 27 92.59 92.11 97.45 85.25 93.64 - 98.88 98.43 89.92 100.00 100.00
CSRNG
17 19 89.47 76.68 89.49 46.89 93.67 95.08 95.71 88.23 - 88.30 85.71
EDN/EDN0
19 21 90.48 81.65 73.54 76.39 95.01 - 95.71 84.80 78.41 67.92 40.86
EDN/EDN1
21 21 100.00 88.16 85.10 80.67 98.70 - 98.18 93.51 91.54 95.70 46.59
ENTROPY_SRC/RNG_4BITS
20 23 86.96 74.41 87.24 51.58 84.40 94.15 96.84 86.09 - 76.44 89.58
FLASH_CTRL
78 79 98.73 95.55 93.81 95.82 97.02 - 95.94 97.14 93.78 95.78 86.39
GPIO
25 27 92.59 97.58 94.01 100.00 98.73 - 99.76 99.80 98.70 77.78 -
HMAC
28 28 100.00 80.46 98.60 45.63 97.16 - 99.74 99.67 96.52 100.00 97.06
I2C
43 50 86.00 84.39 78.34 77.59 97.25 - 96.41 92.33 85.38 73.52 44.05
KEYMGR
29 30 96.67 83.44 94.50 58.09 97.72 - 98.68 97.63 93.16 97.00 86.05
KMAC/MASKED
28 40 70.00 79.71 65.70 79.49 93.95 - 96.87 89.30 84.45 23.06 34.81
KMAC/UNMASKED
27 40 67.50 78.23 63.60 76.64 94.45 - 95.24 87.82 82.81 21.49 30.66
LC_CTRL/VOLATILE_UNLOCK_DISABLED
38 39 97.44 90.97 84.48 93.73 94.69 - 97.28 93.85 79.86 86.93 64.49
LC_CTRL/VOLATILE_UNLOCK_ENABLED
39 39 100.00 90.70 83.94 93.19 94.97 - 97.17 93.66 79.75 85.57 63.55
OTBN
40 42 95.24 91.68 86.20 98.73 90.10 99.27 99.46 94.86 - 84.28 66.20
OTP_CTRL
28 30 93.33 80.07 76.59 69.50 94.13 - 88.42 83.22 90.18 77.88 43.23
PRIM_ALERT
5 5 100.00 91.12 96.19 - 86.05 - 100.00 95.83 95.83 100.00 89.29
PRIM_ESC
1 1 100.00 85.88 86.56 - 85.19 - 92.66 82.22 82.93 100.00 75.00
PRIM_LFSR
4 4 100.00 97.07 99.14 - 95.00 - 100.00 100.00 96.55 100.00 -
PRIM_PRESENT
1 1 100.00 95.88 91.76 - 100.00 - 90.41 100.00 100.00 76.63 -
PRIM_PRINCE
1 1 100.00 100.00 100.00 - 100.00 - 100.00 100.00 100.00 100.00 -
PWRMGR
23 29 79.31 96.39 94.54 96.71 97.91 - 98.92 95.61 94.34 89.83 94.00
ROM_CTRL/32KB
18 19 94.74 95.64 92.52 97.59 96.81 - 98.81 97.81 97.47 95.19 73.33
ROM_CTRL/64KB
18 19 94.74 95.70 92.84 96.87 97.39 - 98.94 98.54 98.07 95.34 73.33
RSTMGR
19 19 100.00 97.80 99.32 95.27 98.80 - 99.51 99.83 98.68 99.25 -
RSTMGR_CNSTY_CHK
1 1 100.00 97.52 95.05 - 100.00 - 98.41 98.31 86.21 100.00 92.31
RV_DM/USE_JTAG_INTERFACE
50 53 94.34 77.60 84.18 53.00 95.63 - 95.04 87.33 87.50 69.22 81.82
RV_TIMER
18 19 94.74 95.79 94.66 95.88 96.82 - 100.00 100.00 100.00 78.66 -
SPI_DEVICE/1R1W
31 33 93.94 83.73 91.31 64.48 95.40 - 98.83 98.11 95.93 74.30 89.36
SPI_HOST
26 26 100.00 91.60 91.30 88.24 95.27 96.96 98.76 93.35 - 73.07 100.00
SRAM_CTRL/MAIN
29 31 93.55 95.81 95.09 94.37 97.96 94.48 95.64 92.86 - 91.84 100.00
SRAM_CTRL/RET
29 31 93.55 91.45 81.75 94.80 97.81 92.19 93.78 88.23 - 78.32 66.67
SYSRST_CTRL
27 27 100.00 80.71 88.59 66.00 87.55 - 94.96 95.85 92.52 100.00 59.62
TL_AGENT
1 1 100.00 - - - - - - - - - -
UART
25 27 92.59 82.90 92.23 58.21 98.27 - 99.48 98.14 96.62 74.67 -
USBDEV
97 100 97.00 87.86 94.40 71.89 97.29 - 98.70 98.17 93.87 96.50 84.75
XBAR_MAIN
18 18 100.00 88.08 99.05 67.03 98.16 - 100.00 100.00 96.50 99.69 -
XBAR_PERI
18 18 100.00 72.42 99.13 20.01 98.13 - 100.00 100.00 96.51 100.00 -