Simulation Results: top_earlgrey_batch_sim

 
14/09/2026 17:05:42 DVSim: v1.53.0 sha: 0de3053 JSON Branch: master
Block Tests Coverage Summary Code Coverage
Pass Total % Overall Code Functional Assertion Block Line Branch Condition Toggle FSM
ADC_CTRL
23 25 92.00 70.31 96.22 18.44 96.27 - 99.05 98.45 94.42 100.00 89.19
AES/MASKED
29 32 90.62 89.97 94.06 77.63 98.23 94.14 95.72 86.97 - 97.99 95.56
AES/UNMASKED
28 32 87.50 87.37 89.81 74.57 97.73 89.70 92.03 80.40 - 97.90 88.89
ALERT_HANDLER
24 26 92.31 91.64 92.62 83.86 98.43 - 99.73 98.84 93.15 92.34 79.03
AON_TIMER
23 23 100.00 96.18 99.08 91.60 97.86 - 99.09 98.56 98.93 99.75 -
CHIP
251 308 81.49 67.75 75.94 30.45 96.86 - 93.57 93.24 89.21 70.34 33.33
CLKMGR
27 27 100.00 93.29 98.31 85.93 95.62 - 99.17 98.96 93.40 100.00 100.00
CSRNG
18 19 94.74 87.77 92.25 76.95 94.10 96.87 97.70 92.22 - 93.37 85.71
EDN/EDN0
21 21 100.00 86.53 82.13 81.15 96.31 - 97.83 92.61 87.00 80.52 52.69
EDN/EDN1
21 21 100.00 87.75 85.34 79.20 98.70 - 98.25 93.94 91.08 95.70 47.73
ENTROPY_SRC/RNG_4BITS
22 23 95.65 75.57 88.46 53.70 84.56 94.43 97.09 86.75 - 76.25 93.75
GPIO
25 27 92.59 97.28 94.05 100.00 97.78 - 99.76 99.80 98.85 77.78 -
HMAC
28 28 100.00 76.06 86.90 43.69 97.60 - 99.64 98.86 95.69 46.17 94.12
I2C
41 50 82.00 84.79 78.57 79.18 96.62 - 96.72 92.55 84.89 74.04 44.64
KEYMGR_DPE/EARLGREY
12 14 85.71 65.03 82.37 15.05 97.67 - 97.27 93.67 86.00 59.22 75.68
KMAC/MASKED
28 40 70.00 79.90 65.26 80.48 93.95 - 96.80 89.23 84.34 23.02 32.91
KMAC/UNMASKED
29 40 72.50 79.08 63.73 79.06 94.45 - 95.50 88.44 82.55 21.49 30.66
LC_CTRL/VOLATILE_UNLOCK_DISABLED
37 39 94.87 90.80 83.97 93.73 94.69 - 97.11 93.61 79.24 85.42 64.49
LC_CTRL/VOLATILE_UNLOCK_ENABLED
36 39 92.31 90.29 83.74 92.29 94.83 - 97.09 93.43 79.01 84.68 64.49
OTBN
40 45 88.89 91.19 85.28 98.31 89.99 99.24 99.45 94.42 - 82.48 64.79
OTP_CTRL
26 30 86.67 81.34 77.42 72.23 94.38 - 88.55 83.32 90.22 81.10 43.92
PRIM_ALERT
5 5 100.00 90.97 95.89 - 86.05 - 100.00 95.83 97.92 100.00 85.71
PRIM_ESC
1 1 100.00 84.44 83.70 - 85.19 - 89.91 77.78 82.93 100.00 67.86
PRIM_LFSR
4 4 100.00 97.07 99.14 - 95.00 - 100.00 100.00 96.55 100.00 -
PRIM_PRESENT
1 1 100.00 89.63 79.26 - 100.00 - 90.41 75.00 75.00 76.63 -
PRIM_PRINCE
1 1 100.00 100.00 100.00 - 100.00 - 100.00 100.00 100.00 100.00 -
PWRMGR
23 29 79.31 95.97 94.46 96.05 97.39 - 98.93 95.43 93.92 90.02 94.00
ROM_CTRL/192KB
16 19 84.21 91.59 92.69 84.41 97.68 - 98.82 98.19 98.07 95.02 73.33
RRAM_CTRL
12 15 80.00 59.67 53.89 45.34 79.77 87.06 88.80 71.91 - 38.19 16.67
RSTMGR
19 19 100.00 97.30 98.99 94.53 98.39 - 99.51 99.83 98.54 98.08 -
RSTMGR_CNSTY_CHK
1 1 100.00 97.81 95.61 - 100.00 - 98.46 98.39 88.89 100.00 92.31
RV_DM/USE_JTAG_INTERFACE
50 53 94.34 83.75 85.38 70.08 95.79 - 95.51 88.41 88.33 70.25 84.42
RV_TIMER
17 19 89.47 96.21 94.66 95.88 98.09 - 100.00 100.00 100.00 78.66 -
SPI_DEVICE/1R1W
31 33 93.94 83.66 90.91 64.68 95.40 - 98.84 98.08 96.08 74.30 87.23
SPI_HOST
26 26 100.00 91.83 91.25 87.82 96.41 96.96 98.76 93.35 - 72.90 100.00
SRAM_CTRL/MAIN
29 31 93.55 94.38 95.07 90.80 97.28 94.48 95.64 92.86 - 91.79 100.00
SRAM_CTRL/RET
29 31 93.55 91.30 81.65 95.00 97.26 92.05 93.71 87.91 - 78.32 66.67
SYSRST_CTRL
26 27 96.30 84.43 93.70 64.04 95.55 - 97.82 97.70 95.41 100.00 77.56
TL_AGENT
1 1 100.00 - - - - - - - - - -
UART
26 27 96.30 81.55 90.79 55.59 98.27 - 98.86 96.50 93.12 74.67 -
USBDEV
98 100 98.00 88.05 94.15 72.71 97.29 - 98.64 97.96 94.06 97.03 83.05
XBAR_MAIN
18 18 100.00 83.09 99.10 52.23 97.95 - 100.00 100.00 97.03 99.37 -
XBAR_PERI
18 18 100.00 78.50 99.13 37.98 98.38 - 100.00 100.00 96.51 100.00 -