Simulation Results: top_earlgrey_batch_sim

 
13/06/2026 02:15:06 DVSim: v1.49.0 sha: 9424e63 JSON Branch: master
Block Tests Coverage Summary Code Coverage
Pass Total % Overall Code Functional Assertion Block Line Branch Condition Toggle FSM
ADC_CTRL
135 233 57.94 67.53 96.19 13.69 92.71 - 98.89 97.46 87.55 99.76 97.30
AES/MASKED
997 1110 89.82 97.55 96.58 97.71 98.38 96.93 97.78 92.75 - 97.99 97.78
AES/UNMASKED
994 1110 89.55 96.26 93.15 97.71 97.92 93.94 95.22 87.54 - 97.99 91.85
ALERT_HANDLER
541 593 91.23 99.14 98.93 99.60 98.88 - 99.99 99.99 97.56 97.09 100.00
AON_TIMER
180 180 100.00 98.97 98.81 100.00 98.10 - 99.09 98.56 99.05 98.53 -
CHIP
1728 2008 86.06 94.41 85.85 99.38 98.00 - 94.78 94.86 93.47 89.00 57.14
CLKMGR
245 273 89.74 93.88 98.56 87.31 95.76 - 99.07 98.74 95.81 99.19 100.00
CSRNG
1355 1403 96.58 94.62 96.20 90.50 97.16 98.53 99.54 96.38 - 93.64 95.24
EDN/EDN0
676 688 98.26 95.79 95.78 92.66 98.92 - 98.91 96.51 93.91 97.12 92.47
EDN/EDN1
678 688 98.55 95.66 96.30 92.23 98.44 - 98.48 94.59 94.54 96.15 97.73
ENTROPY_SRC/RNG_4BITS
2395 2453 97.64 91.10 90.41 92.91 89.98 95.16 97.82 88.01 - 78.91 96.88
FLASH_CTRL
1139 1154 98.70 97.07 95.81 98.39 97.02 - 96.11 97.45 94.98 98.66 91.84
GPIO
232 253 91.70 98.79 98.27 100.00 98.10 - 99.76 99.80 99.57 93.94 -
HMAC
694 694 100.00 98.63 98.60 99.68 97.60 - 99.74 99.67 96.52 100.00 97.06
I2C
574 755 76.03 90.07 83.44 89.32 97.46 - 97.19 93.68 89.03 89.66 47.62
KEYMGR
640 653 98.01 95.73 98.28 91.18 97.72 - 99.16 98.90 98.04 97.61 97.67
KMAC/MASKED
339 540 62.78 85.75 74.15 84.65 98.45 - 97.17 93.00 90.20 29.60 60.76
KMAC/UNMASKED
335 540 62.04 84.09 72.03 82.59 97.66 - 95.05 91.00 90.04 27.88 56.20
LC_CTRL/VOLATILE_UNLOCK_DISABLED
517 523 98.85 92.08 85.86 96.26 94.13 - 97.28 94.00 81.55 88.25 68.22
LC_CTRL/VOLATILE_UNLOCK_ENABLED
515 523 98.47 92.31 86.02 96.09 94.83 - 97.26 93.80 81.62 88.25 69.16
OTBN
419 436 96.10 98.16 96.78 100.00 97.69 99.53 99.64 93.99 - 93.49 100.00
OTP_CTRL
807 903 89.37 91.22 85.98 92.23 95.46 - 90.25 86.75 94.02 95.85 63.02
PATTGEN
330 443 74.49 95.59 98.87 89.42 98.48 100.00 100.00 100.00 - 96.61 -
PRIM_ALERT
60 60 100.00 91.54 97.02 - 86.05 - 100.00 95.83 100.00 100.00 89.29
PRIM_ESC
20 20 100.00 89.45 93.71 - 85.19 - 95.41 88.89 87.80 100.00 96.43
PRIM_LFSR
4 4 100.00 97.07 99.14 - 95.00 - 100.00 100.00 96.55 100.00 -
PRIM_PRESENT
1 1 100.00 95.88 91.76 - 100.00 - 90.41 100.00 100.00 76.63 -
PRIM_PRINCE
10 10 100.00 100.00 100.00 - 100.00 - 100.00 100.00 100.00 100.00 -
PWM
189 189 100.00 98.23 96.82 98.68 99.20 99.80 99.85 99.74 - 90.87 -
PWRMGR
258 273 94.51 98.50 97.54 99.01 98.96 - 99.09 96.37 96.61 99.62 96.00
ROM_CTRL/32KB
152 156 97.44 98.58 98.77 99.28 97.68 - 99.46 100.00 98.81 95.57 100.00
ROM_CTRL/64KB
154 156 98.72 98.72 98.77 100.00 97.39 - 99.46 100.00 98.81 95.57 100.00
RSTMGR
148 148 100.00 99.12 99.66 98.76 98.93 - 99.51 99.83 99.31 100.00 -
RSTMGR_CNSTY_CHK
10 10 100.00 97.52 95.05 - 100.00 - 98.41 98.31 86.21 100.00 92.31
RV_DM/USE_JTAG_INTERFACE
333 368 90.49 79.73 90.13 53.20 95.87 - 96.25 90.50 90.69 77.11 96.10
RV_TIMER
181 223 81.17 99.28 100.00 99.12 98.73 - 100.00 100.00 100.00 100.00 -
SPI_DEVICE/1R1W
395 416 94.95 95.97 93.33 99.06 95.52 - 98.90 98.30 96.57 83.54 89.36
SPI_HOST
219 220 99.55 94.13 95.03 90.76 96.60 96.96 98.76 93.35 - 88.02 100.00
SRAM_CTRL/MAIN
224 248 90.32 97.20 96.91 96.60 98.10 96.30 97.05 94.50 - 96.09 100.00
SRAM_CTRL/RET
224 248 90.32 92.79 83.50 96.80 98.08 94.03 95.21 89.83 - 82.28 66.67
SYSRST_CTRL
402 410 98.05 95.93 98.41 90.64 98.75 - 99.42 99.52 97.60 100.00 95.51
TL_AGENT
10 10 100.00 - - - - - - - - - -
UART
441 453 97.35 98.29 96.86 99.16 98.85 - 99.48 98.14 98.25 91.55 -
USBDEV
1754 1780 98.54 97.57 96.96 98.46 97.29 - 98.79 98.34 95.50 97.23 94.92
XBAR_MAIN
450 450 100.00 99.31 99.17 100.00 98.77 - 100.00 100.00 96.67 100.00 -
XBAR_PERI
450 450 100.00 99.52 99.13 100.00 99.44 - 100.00 100.00 96.51 100.00 -