Simulation Results: top_earlgrey_batch_sim

 
07/05/2026 15:30:24 DVSim: v1.34.0 sha: 9bbcf3f json Branch: master
Block Tests Coverage Summary Code Coverage
Pass Total % Overall Code Functional Assertion Block Line Branch Condition Toggle FSM
ADC_CTRL
15 25 60.00 65.18 91.74 12.89 90.92 - 98.03 96.29 86.23 99.76 78.38
AES/MASKED
28 32 87.50 88.44 93.59 73.50 98.23 94.31 96.00 87.24 - 97.81 93.33
AES/UNMASKED
29 32 90.62 88.02 89.73 76.60 97.73 89.43 91.77 79.54 - 97.99 89.63
ALERT_HANDLER
25 26 96.15 90.72 93.29 80.54 98.33 - 99.74 98.36 92.58 93.49 82.26
AON_TIMER
23 23 100.00 95.76 98.47 92.13 96.67 - 99.09 98.56 99.05 97.18 -
CHIP
256 328 78.05 76.35 84.91 46.89 97.25 - 94.30 93.06 88.81 91.23 57.14
CLKMGR
26 27 96.30 93.49 98.44 86.28 95.76 - 99.12 98.85 95.06 99.19 100.00
CSRNG
17 19 89.47 87.79 92.31 77.84 93.23 96.98 97.73 92.42 - 93.37 85.71
EDN/EDN0
21 21 100.00 85.80 80.63 81.75 95.01 - 96.96 89.40 85.20 81.05 50.54
EDN/EDN1
21 21 100.00 86.46 82.20 80.04 97.14 - 98.03 93.07 89.23 86.33 44.32
ENTROPY_SRC/RNG_4BITS
22 22 100.00 76.06 89.39 55.06 83.74 94.58 97.29 86.91 - 76.49 96.88
FLASH_CTRL
79 79 100.00 95.58 94.49 95.57 96.67 - 95.98 97.10 93.73 97.21 88.44
GPIO
25 27 92.59 97.98 97.09 100.00 96.84 - 99.76 99.80 98.56 90.24 -
HMAC
28 28 100.00 79.32 97.23 44.02 96.70 - 99.59 99.17 96.23 100.00 91.18
I2C
42 50 84.00 86.22 81.50 81.18 95.98 - 96.51 92.33 84.93 89.66 44.05
KEYMGR
30 30 100.00 87.92 96.17 70.11 97.49 - 98.88 97.90 93.24 97.80 93.02
KMAC/MASKED
40 40 100.00 93.96 90.35 93.55 97.98 - 98.67 96.11 93.42 99.46 64.08
KMAC/UNMASKED
38 40 95.00 93.04 88.00 93.36 97.75 - 97.11 94.46 91.51 99.92 57.02
LC_CTRL/VOLATILE_UNLOCK_DISABLED
39 39 100.00 90.93 84.53 94.13 94.13 - 97.24 93.85 79.31 88.68 63.55
LC_CTRL/VOLATILE_UNLOCK_ENABLED
38 39 97.44 90.20 83.93 92.53 94.13 - 97.08 93.23 78.87 88.79 61.68
OTBN
38 42 90.48 93.69 95.52 95.76 89.78 99.45 99.59 92.99 - 92.05 97.44
OTP_CTRL
26 30 86.67 78.55 75.35 66.52 93.79 - 88.45 82.89 89.72 74.53 41.15
PATTGEN
16 18 88.89 95.08 98.87 89.42 96.95 100.00 100.00 100.00 - 96.61 -
PRIM_ALERT
5 5 100.00 91.12 96.19 - 86.05 - 100.00 95.83 95.83 100.00 89.29
PRIM_ESC
1 1 100.00 82.83 80.48 - 85.19 - 88.07 75.56 78.05 100.00 60.71
PRIM_LFSR
4 4 100.00 97.07 99.14 - 95.00 - 100.00 100.00 96.55 100.00 -
PRIM_PRESENT
1 1 100.00 95.88 91.76 - 100.00 - 90.41 100.00 100.00 76.63 -
PRIM_PRINCE
1 1 100.00 100.00 100.00 - 100.00 - 100.00 100.00 100.00 100.00 -
PWM
17 17 100.00 97.60 96.12 98.68 98.00 98.98 99.28 98.21 - 90.87 -
PWRMGR
25 28 89.29 95.56 94.45 97.20 95.04 - 98.92 95.61 94.63 89.08 94.00
ROM_CTRL/32KB
19 19 100.00 97.02 97.75 96.66 96.66 - 99.46 99.27 97.33 99.34 93.33
ROM_CTRL/64KB
19 19 100.00 97.14 97.95 96.66 96.80 - 99.59 99.27 98.37 99.21 93.33
RSTMGR
19 19 100.00 97.52 99.19 95.52 97.86 - 99.51 99.83 98.61 98.83 -
RSTMGR_CNSTY_CHK
1 1 100.00 97.52 95.05 - 100.00 - 98.41 98.31 86.21 100.00 92.31
RV_DM/USE_JTAG_INTERFACE
51 53 96.23 77.17 85.89 50.30 95.31 - 95.78 89.33 88.71 73.81 81.82
RV_TIMER
16 19 84.21 97.11 99.92 95.88 95.54 - 100.00 100.00 99.69 100.00 -
SPI_DEVICE/1R1W
31 33 93.94 82.66 93.15 61.95 92.89 - 99.03 98.20 95.62 83.54 89.36
SPI_DEVICE/2P
33 33 100.00 86.49 94.12 70.73 94.62 - 99.12 98.39 96.00 87.74 89.36
SPI_HOST
26 26 100.00 92.61 95.03 88.66 94.13 96.96 98.76 93.35 - 88.02 100.00
SRAM_CTRL/MAIN
31 31 100.00 96.04 96.81 95.00 96.32 96.08 96.81 94.33 - 96.09 100.00
SRAM_CTRL/RET
31 31 100.00 90.74 82.99 92.80 96.43 93.32 94.44 88.58 - 82.28 66.67
SYSRST_CTRL
27 27 100.00 84.84 92.05 71.19 91.28 - 96.46 96.96 93.77 100.00 73.08
TL_AGENT
1 1 100.00 - - - - - - - - - -
UART
24 27 88.89 81.16 94.69 51.68 97.12 - 98.86 96.27 92.07 91.55 -
USBDEV
98 100 98.00 87.71 94.22 72.71 96.20 - 98.60 98.04 94.39 97.02 83.05
XBAR_MAIN
18 18 100.00 82.48 99.14 50.60 97.69 - 100.00 100.00 96.55 100.00 -
XBAR_PERI
18 18 100.00 75.84 98.95 30.53 98.05 - 100.00 100.00 95.79 100.00 -