Simulation Results: top_earlgrey_batch_sim

 
25/05/2026 15:30:28 DVSim: v1.49.1 sha: d315e4a JSON Branch: master
Block Tests Coverage Summary Code Coverage
Pass Total % Overall Code Functional Assertion Block Line Branch Condition Toggle FSM
ADC_CTRL
15 25 60.00 65.73 92.30 12.99 91.90 - 98.13 96.41 86.10 99.76 81.08
AES/MASKED
30 32 93.75 89.15 93.58 75.63 98.23 94.20 95.86 87.14 - 97.99 93.33
AES/UNMASKED
31 32 96.88 88.64 89.66 78.53 97.73 89.60 91.98 79.87 - 97.90 88.89
ALERT_HANDLER
23 26 88.46 88.07 88.67 78.04 97.49 - 99.55 98.35 91.42 86.27 67.74
AON_TIMER
23 23 100.00 96.21 98.41 92.13 98.10 - 99.09 98.56 98.93 97.06 -
CHIP
252 329 76.60 75.05 85.25 42.54 97.37 - 94.44 94.04 89.42 91.20 57.14
CLKMGR
25 27 92.59 93.05 98.24 85.42 95.48 - 99.02 98.69 94.32 99.19 100.00
CSRNG
16 19 84.21 84.23 92.27 65.89 94.54 96.95 97.62 92.43 - 93.31 85.71
EDN/EDN0
21 21 100.00 84.03 79.55 78.17 94.36 - 96.58 88.15 82.94 80.08 50.00
EDN/EDN1
21 21 100.00 88.49 84.41 82.35 98.70 - 98.18 93.51 89.92 94.99 45.45
ENTROPY_SRC/RNG_4BITS
22 22 100.00 74.88 88.17 52.87 83.58 94.45 97.09 86.80 - 75.06 93.75
FLASH_CTRL
77 79 97.47 95.61 94.14 95.76 96.93 - 96.00 97.19 93.79 97.99 85.71
GPIO
25 27 92.59 98.08 97.42 100.00 96.84 - 99.76 99.80 97.84 92.26 -
HMAC
28 28 100.00 80.39 98.61 44.55 98.02 - 99.74 99.67 96.57 100.00 97.06
I2C
43 50 86.00 87.17 81.92 82.77 96.83 - 96.48 92.55 87.07 89.45 44.05
KEYMGR
29 30 96.67 86.47 94.33 67.58 97.49 - 98.68 97.44 94.36 97.43 83.72
KMAC/MASKED
40 40 100.00 94.55 90.39 95.27 97.98 - 98.63 96.19 94.04 99.70 63.38
KMAC/UNMASKED
39 40 97.50 92.43 87.73 91.05 98.50 - 97.24 94.98 93.65 99.87 52.89
LC_CTRL/VOLATILE_UNLOCK_DISABLED
39 39 100.00 89.81 82.95 92.35 94.13 - 97.15 93.56 79.17 85.04 59.81
LC_CTRL/VOLATILE_UNLOCK_ENABLED
38 39 97.44 90.43 84.09 93.06 94.13 - 97.13 93.37 79.70 85.75 64.49
OTBN
38 42 90.48 92.28 95.31 91.10 90.43 99.41 99.54 92.58 - 91.55 97.56
OTP_CTRL
26 30 86.67 81.03 77.06 71.46 94.56 - 88.44 83.07 89.80 82.34 41.67
PATTGEN
16 18 88.89 95.59 98.87 89.42 98.48 100.00 100.00 100.00 - 96.61 -
PRIM_ALERT
4 5 80.00 90.97 95.89 - 86.05 - 100.00 95.83 97.92 100.00 85.71
PRIM_ESC
1 1 100.00 83.51 81.82 - 85.19 - 88.99 77.78 78.05 100.00 64.29
PRIM_LFSR
4 4 100.00 97.07 99.14 - 95.00 - 100.00 100.00 96.55 100.00 -
PRIM_PRESENT
1 1 100.00 95.88 91.76 - 100.00 - 90.41 100.00 100.00 76.63 -
PRIM_PRINCE
1 1 100.00 100.00 100.00 - 100.00 - 100.00 100.00 100.00 100.00 -
PWM
17 17 100.00 98.03 96.21 98.68 99.20 99.08 99.36 98.40 - 90.87 -
PWRMGR
26 28 92.86 97.90 97.47 97.53 98.69 - 99.09 96.18 96.46 99.62 96.00
ROM_CTRL/32KB
19 19 100.00 97.89 99.15 97.85 96.66 - 99.59 98.91 97.33 99.92 100.00
ROM_CTRL/64KB
19 19 100.00 97.97 99.58 96.66 97.67 - 99.59 99.64 98.66 100.00 100.00
RSTMGR
19 19 100.00 97.70 99.30 95.27 98.53 - 99.51 99.83 98.68 99.16 -
RSTMGR_CNSTY_CHK
1 1 100.00 97.52 95.05 - 100.00 - 98.41 98.31 86.21 100.00 92.31
RV_DM/USE_JTAG_INTERFACE
51 53 96.23 78.25 85.81 53.14 95.79 - 94.88 88.83 87.60 74.61 83.12
RV_TIMER
16 19 84.21 91.48 99.92 76.76 97.77 - 100.00 100.00 99.69 100.00 -
SPI_DEVICE/1R1W
31 33 93.94 85.13 93.22 66.77 95.39 - 98.89 98.27 96.04 83.54 89.36
SPI_DEVICE/2P
33 33 100.00 88.11 94.10 74.85 95.37 - 98.92 98.26 96.21 87.74 89.36
SPI_HOST
25 26 96.15 92.80 94.90 88.24 95.27 96.78 98.54 93.05 - 88.02 100.00
SRAM_CTRL/MAIN
31 31 100.00 95.49 96.04 92.60 97.82 95.07 95.70 92.38 - 96.09 100.00
SRAM_CTRL/RET
31 31 100.00 91.90 83.09 94.80 97.80 93.39 94.52 88.89 - 82.28 66.67
SYSRST_CTRL
27 27 100.00 80.58 91.47 58.50 91.76 - 96.37 97.00 93.08 99.77 71.15
TL_AGENT
1 1 100.00 - - - - - - - - - -
UART
26 27 96.30 83.83 95.84 57.67 97.98 - 99.17 97.44 95.22 91.55 -
USBDEV
98 100 98.00 89.34 94.66 76.07 97.29 - 98.68 98.13 94.61 97.13 84.75
XBAR_MAIN
18 18 100.00 85.37 99.14 58.68 98.30 - 100.00 100.00 96.55 100.00 -
XBAR_PERI
18 18 100.00 73.72 99.10 23.95 98.12 - 100.00 100.00 96.39 100.00 -