Simulation Results: top_earlgrey_batch_sim

 
10/06/2026 15:30:31 DVSim: v1.49.9 sha: 26f59d7 JSON Branch: master
Block Tests Coverage Summary Code Coverage
Pass Total % Overall Code Functional Assertion Block Line Branch Condition Toggle FSM
ADC_CTRL
15 25 60.00 65.61 93.22 11.54 92.06 - 98.03 96.29 85.98 99.29 86.49
AES/MASKED
28 32 87.50 87.62 93.12 71.51 98.23 94.16 95.75 86.88 - 97.99 91.85
AES/UNMASKED
29 32 90.62 87.09 88.98 74.19 98.11 89.36 91.86 79.42 - 97.99 86.67
ALERT_HANDLER
25 26 96.15 91.42 93.25 82.59 98.42 - 99.75 98.43 92.27 90.34 85.48
AON_TIMER
23 23 100.00 96.13 98.81 92.91 96.67 - 99.09 98.56 99.05 98.53 -
CHIP
246 329 74.77 73.09 85.07 36.82 97.37 - 94.36 93.63 88.96 91.28 57.14
CLKMGR
26 27 96.30 93.14 98.26 86.11 95.06 - 99.16 98.90 93.24 100.00 100.00
CSRNG
17 19 89.47 86.97 92.11 74.91 93.89 96.82 97.55 92.09 - 93.10 85.71
EDN/EDN0
21 21 100.00 84.53 78.61 79.96 95.01 - 96.85 89.40 83.92 75.59 47.31
EDN/EDN1
21 21 100.00 86.51 82.15 80.25 97.14 - 97.72 92.21 89.92 87.74 43.18
ENTROPY_SRC/RNG_4BITS
21 23 91.30 75.97 88.99 54.04 84.89 94.56 97.24 86.86 - 76.02 95.83
FLASH_CTRL
78 79 98.73 95.74 94.44 95.85 96.93 - 95.99 97.16 94.15 97.84 87.07
GPIO
25 27 92.59 98.61 97.42 99.99 98.42 - 99.76 99.80 98.70 91.41 -
HMAC
28 28 100.00 80.23 97.96 44.28 98.46 - 99.69 99.50 96.51 100.00 94.12
I2C
42 50 84.00 88.06 81.73 85.20 97.25 - 96.57 92.62 86.92 89.66 42.86
KEYMGR
29 30 96.67 85.36 94.08 64.51 97.49 - 98.60 97.26 93.52 97.32 83.72
KMAC/MASKED
40 40 100.00 95.01 91.19 94.99 98.85 - 99.05 96.84 94.39 99.46 66.20
KMAC/UNMASKED
40 40 100.00 92.31 87.68 90.76 98.50 - 97.28 94.98 93.29 99.96 52.89
LC_CTRL/VOLATILE_UNLOCK_DISABLED
37 39 94.87 90.20 83.92 91.99 94.69 - 97.15 93.70 79.36 85.83 63.55
LC_CTRL/VOLATILE_UNLOCK_ENABLED
38 39 97.44 90.93 84.04 93.77 94.97 - 97.04 93.37 79.54 87.62 62.62
OTBN
40 42 95.24 94.48 94.27 98.73 90.43 99.34 99.51 91.73 - 88.27 97.56
OTP_CTRL
28 30 93.33 83.83 79.48 77.12 94.88 - 88.62 83.59 90.38 89.49 45.31
PATTGEN
15 18 83.33 95.59 98.87 89.42 98.48 100.00 100.00 100.00 - 96.61 -
PRIM_ALERT
4 5 80.00 90.61 95.18 - 86.05 - 100.00 95.83 97.92 100.00 82.14
PRIM_ESC
1 1 100.00 86.36 87.54 - 85.19 - 92.66 82.22 87.80 100.00 75.00
PRIM_LFSR
4 4 100.00 97.07 99.14 - 95.00 - 100.00 100.00 96.55 100.00 -
PRIM_PRESENT
1 1 100.00 95.88 91.76 - 100.00 - 90.41 100.00 100.00 76.63 -
PRIM_PRINCE
1 1 100.00 100.00 100.00 - 100.00 - 100.00 100.00 100.00 100.00 -
PWM
16 17 94.12 98.04 96.24 98.68 99.20 99.12 99.40 98.46 - 90.87 -
PWRMGR
27 29 93.10 97.13 95.42 97.53 98.43 - 99.09 96.37 94.48 91.15 96.00
ROM_CTRL/32KB
19 19 100.00 97.41 97.79 96.90 97.53 - 99.32 98.54 97.77 100.00 93.33
ROM_CTRL/64KB
19 19 100.00 97.65 98.06 97.37 97.53 - 99.46 99.27 98.22 100.00 93.33
RSTMGR
19 19 100.00 97.56 99.15 95.27 98.26 - 99.51 99.83 98.19 99.08 -
RSTMGR_CNSTY_CHK
1 1 100.00 97.52 95.05 - 100.00 - 98.41 98.31 86.21 100.00 92.31
RV_DM/USE_JTAG_INTERFACE
51 53 96.23 78.06 86.18 52.46 95.55 - 95.30 89.00 88.61 74.89 83.12
RV_TIMER
18 19 94.74 96.52 100.00 91.47 98.09 - 100.00 100.00 100.00 100.00 -
SPI_DEVICE/1R1W
31 33 93.94 84.48 93.16 64.88 95.39 - 98.84 98.14 95.92 83.54 89.36
SPI_DEVICE/2P
33 33 100.00 88.56 94.02 76.29 95.37 - 98.88 98.18 95.92 87.74 89.36
SPI_HOST
26 26 100.00 93.14 95.03 89.50 94.89 96.96 98.76 93.35 - 88.02 100.00
SRAM_CTRL/MAIN
30 31 96.77 95.65 95.94 93.20 97.82 95.00 95.47 92.22 - 96.09 100.00
SRAM_CTRL/RET
31 31 100.00 91.88 83.30 94.80 97.53 93.66 94.89 89.36 - 82.28 66.67
SYSRST_CTRL
27 27 100.00 86.24 94.32 67.95 96.46 - 98.12 97.92 95.43 100.00 80.13
TL_AGENT
1 1 100.00 - - - - - - - - - -
UART
27 27 100.00 83.71 95.87 57.27 97.98 - 99.17 97.44 95.33 91.55 -
USBDEV
98 100 98.00 88.19 93.83 73.44 97.29 - 98.64 98.08 94.27 96.81 81.36
XBAR_MAIN
18 18 100.00 83.99 99.11 54.68 98.19 - 100.00 100.00 96.45 100.00 -
XBAR_PERI
18 18 100.00 77.88 99.13 36.40 98.12 - 100.00 100.00 96.51 100.00 -