Simulation Results: top_earlgrey_batch_sim

 
08/09/2026 16:50:36 DVSim: v1.52.1 sha: 1c01039 JSON Branch: master
Instrumentation Report
Block Tests Coverage Summary Code Coverage
Pass Total % Overall Code Functional Assertion Block Line Branch Condition Toggle FSM
ADC_CTRL
21 25 84.00 70.47 96.16 18.64 96.60 - 99.05 98.51 94.04 100.00 89.19
AES/MASKED
29 32 90.62 89.06 94.62 74.19 98.38 95.01 95.92 89.02 - 97.99 95.56
AES/UNMASKED
27 32 84.38 87.52 90.06 74.76 97.73 90.12 91.79 81.56 - 97.99 88.89
ALERT_HANDLER
25 26 96.15 90.07 91.72 80.06 98.43 - 99.71 98.14 91.33 90.39 79.03
AON_TIMER
22 23 95.65 95.75 98.59 90.81 97.86 - 99.09 98.56 98.69 98.01 -
CHIP
235 308 76.30 69.17 76.01 34.89 96.61 - 93.66 93.28 89.72 70.06 33.33
CLKMGR
16 27 59.26 88.69 96.82 78.56 90.68 - 98.69 98.28 87.76 99.36 100.00
CSRNG
17 19 89.47 87.43 92.03 75.95 94.32 96.87 97.74 92.22 - 92.43 85.71
EDN/EDN0
12 21 57.14 84.51 80.79 78.37 94.36 - 97.34 90.38 85.03 81.74 49.46
EDN/EDN1
9 21 42.86 76.71 87.75 44.33 98.06 - 94.10 77.65 83.50 95.74 -
ENTROPY_SRC/RNG_4BITS
21 23 91.30 76.68 89.06 56.57 84.40 94.56 97.21 86.91 - 76.31 95.83
GPIO
25 27 92.59 97.30 94.12 100.00 97.78 - 99.76 99.80 98.41 78.50 -
HMAC
28 28 100.00 75.96 86.90 43.37 97.60 - 99.64 98.86 95.69 46.17 94.12
I2C
9 50 18.00 81.16 97.60 47.78 98.11 - 98.94 97.43 94.04 100.00 -
KEYMGR_DPE/EARLGREY
12 14 85.71 65.10 82.54 15.09 97.67 - 97.60 93.67 86.63 59.12 75.68
KMAC/MASKED
16 40 40.00 69.62 63.96 53.75 91.14 - 95.88 87.28 77.77 22.80 36.08
KMAC/UNMASKED
13 40 32.50 84.97 97.73 58.12 99.07 - 99.09 98.64 96.14 97.07 -
LC_CTRL/VOLATILE_UNLOCK_DISABLED
36 39 92.31 90.47 83.76 92.83 94.83 - 97.15 93.61 79.17 85.31 63.55
LC_CTRL/VOLATILE_UNLOCK_ENABLED
38 39 97.44 90.26 83.29 93.37 94.13 - 97.00 93.00 79.28 83.64 63.55
OTBN
34 45 75.56 89.41 81.65 97.03 89.55 97.67 97.88 81.48 - 81.03 66.20
OTP_CTRL
0 30 0.00 - - - - - - - - - -
PRIM_ALERT
5 5 100.00 90.55 95.06 - 86.05 - 100.00 95.83 93.75 100.00 85.71
PRIM_ESC
1 1 100.00 84.20 83.21 - 85.19 - 89.91 77.78 80.49 100.00 67.86
PRIM_LFSR
3 4 75.00 96.86 99.14 - 94.59 - 100.00 100.00 96.55 100.00 -
PRIM_PRESENT
1 1 100.00 89.63 79.26 - 100.00 - 90.41 75.00 75.00 76.63 -
PRIM_PRINCE
1 1 100.00 100.00 100.00 - 100.00 - 100.00 100.00 100.00 100.00 -
PWRMGR
23 29 79.31 95.95 94.42 96.05 97.39 - 98.93 95.43 93.92 89.83 94.00
ROM_CTRL/192KB
18 19 94.74 94.18 91.55 93.76 97.24 - 98.95 98.56 98.22 95.34 66.67
RSTMGR
19 19 100.00 98.11 99.29 96.77 98.26 - 99.51 99.83 98.75 99.08 -
RSTMGR_CNSTY_CHK
0 1 0.00 - - - - - - - - - -
RV_DM/USE_JTAG_INTERFACE
49 53 92.45 83.15 83.98 69.75 95.71 - 94.78 88.25 87.64 68.73 80.52
RV_TIMER
17 19 89.47 95.40 94.66 94.71 96.82 - 100.00 100.00 100.00 78.66 -
SPI_DEVICE/1R1W
20 33 60.61 81.78 91.07 66.82 87.44 - 98.86 98.13 95.19 73.83 89.36
SPI_HOST
10 26 38.46 90.66 90.60 87.82 93.57 96.56 98.76 92.45 - 71.18 100.00
SRAM_CTRL/MAIN
28 31 90.32 94.40 94.32 91.20 97.69 93.47 94.53 90.91 - 91.84 100.00
SRAM_CTRL/RET
28 31 90.32 90.16 80.27 92.80 97.40 90.29 91.46 84.62 - 78.32 66.67
SYSRST_CTRL
24 27 88.89 85.15 91.46 72.70 91.29 - 96.35 96.63 94.46 100.00 69.87
TL_AGENT
1 1 100.00 - - - - - - - - - -
UART
24 27 88.89 77.68 91.74 44.18 97.12 - 99.17 97.44 95.68 74.67 -
USBDEV
96 100 96.00 88.72 94.15 74.71 97.29 - 98.68 98.05 93.96 97.03 83.05
XBAR_MAIN
18 18 100.00 82.56 99.10 50.72 97.87 - 100.00 100.00 97.03 99.37 -
XBAR_PERI
18 18 100.00 74.66 99.09 26.10 98.77 - 100.00 100.00 96.38 100.00 -