Simulation Results: top_earlgrey_batch_sim

 
15/04/2026 16:33:45 DVSim: v1.30.1 sha: cf700e4 json Branch: master
Block Tests Coverage Summary Code Coverage
Pass Total % Overall Code Functional Assertion Block Line Branch Condition Toggle FSM
ADC_CTRL
25 25 100.00 70.61 97.47 18.41 95.95 - 99.02 97.71 93.34 100.00 97.30
AES/MASKED
34 35 97.14 86.53 95.25 66.06 98.29 95.91 97.66 89.80 - 98.05 95.48
AES/UNMASKED
34 35 97.14 85.12 92.03 65.59 97.75 92.47 94.21 86.55 - 97.99 89.36
ALERT_HANDLER
24 26 92.31 89.05 90.46 78.93 97.77 - 99.61 98.22 90.60 92.91 70.97
AON_TIMER
23 23 100.00 95.60 98.78 91.34 96.67 - 99.09 98.56 98.93 98.53 -
CHIP
258 328 78.66 76.03 85.24 45.35 97.50 - 94.38 93.55 89.81 91.32 57.14
CLKMGR
26 27 96.30 91.96 97.70 84.39 93.79 - 98.85 98.62 91.83 99.19 100.00
CSRNG
16 19 84.21 77.14 92.78 46.07 92.58 95.30 95.95 88.54 - 91.41 95.24
EDN/EDN0
20 21 95.24 83.45 78.62 77.38 94.36 - 96.68 88.70 83.05 73.58 51.08
EDN/EDN1
21 21 100.00 86.80 82.80 80.46 97.14 - 98.18 93.07 88.15 85.75 48.86
ENTROPY_SRC/RNG_4BITS
22 22 100.00 75.98 88.63 55.58 83.74 94.81 97.45 87.18 - 76.15 93.75
FLASH_CTRL
79 79 100.00 95.32 94.03 95.42 96.50 - 95.98 97.08 93.37 98.01 85.71
GPIO
24 27 88.89 97.61 96.00 100.00 96.84 - 98.93 99.01 97.84 88.22 -
HMAC
28 28 100.00 79.91 97.94 45.09 96.70 - 99.69 99.50 96.40 100.00 94.12
I2C
42 50 84.00 85.27 81.49 78.75 95.56 - 96.41 92.33 85.23 89.45 44.05
KEYMGR
30 30 100.00 85.64 94.73 64.71 97.49 - 98.76 97.53 92.96 96.01 88.37
KMAC/MASKED
40 40 100.00 94.29 90.75 94.13 97.98 - 98.89 96.50 93.81 99.76 64.79
KMAC/UNMASKED
39 40 97.50 93.00 87.89 93.36 97.75 - 97.27 95.36 94.07 99.87 52.89
LC_CTRL/VOLATILE_UNLOCK_DISABLED
39 39 100.00 90.65 84.41 93.42 94.13 - 97.26 93.97 79.59 87.68 63.55
LC_CTRL/VOLATILE_UNLOCK_ENABLED
39 39 100.00 89.92 83.83 91.81 94.13 - 97.06 93.47 79.14 88.71 60.75
OTBN
41 42 97.62 94.21 95.26 97.88 89.50 99.35 99.55 91.88 - 92.18 97.44
OTP_CTRL
28 30 93.33 80.44 77.93 69.35 94.05 - 88.67 82.89 89.44 85.27 43.40
PATTGEN
14 18 77.78 95.08 98.87 89.42 96.95 100.00 100.00 100.00 - 96.61 -
PRIM_ALERT
5 5 100.00 90.41 94.76 - 86.05 - 100.00 95.83 95.83 100.00 82.14
PRIM_ESC
1 1 100.00 84.56 83.92 - 85.19 - 89.91 77.78 80.49 100.00 71.43
PRIM_LFSR
4 4 100.00 97.07 99.14 - 95.00 - 100.00 100.00 96.55 100.00 -
PRIM_PRESENT
1 1 100.00 95.88 91.76 - 100.00 - 90.41 100.00 100.00 76.63 -
PRIM_PRINCE
1 1 100.00 100.00 100.00 - 100.00 - 100.00 100.00 100.00 100.00 -
PWM
17 17 100.00 97.50 96.16 98.35 98.00 99.05 99.28 98.33 - 90.87 -
PWRMGR
24 28 85.71 95.80 94.52 96.54 96.34 - 98.92 95.61 94.06 90.02 94.00
ROM_CTRL/32KB
19 19 100.00 97.37 97.93 97.37 96.80 - 99.59 99.27 97.47 99.97 93.33
ROM_CTRL/64KB
19 19 100.00 97.37 97.94 97.37 96.80 - 99.46 99.27 97.62 100.00 93.33
RSTMGR
19 19 100.00 98.07 99.09 97.26 97.86 - 99.51 99.83 97.92 99.08 -
RSTMGR_CNSTY_CHK
1 1 100.00 97.52 95.05 - 100.00 - 98.41 98.31 86.21 100.00 92.31
RV_DM/USE_JTAG_INTERFACE
47 53 88.68 73.94 83.42 43.18 95.23 - 94.14 85.00 83.91 73.53 80.52
RV_TIMER
17 19 89.47 98.16 100.00 97.65 96.82 - 100.00 100.00 100.00 100.00 -
SPI_DEVICE/1R1W
31 33 93.94 83.03 93.24 61.21 94.64 - 99.02 98.16 96.13 83.54 89.36
SPI_DEVICE/2P
33 33 100.00 83.98 94.07 65.87 91.99 - 99.13 98.39 95.74 87.74 89.36
SPI_HOST
26 26 100.00 92.89 95.03 89.50 94.13 96.96 98.76 93.35 - 88.02 100.00
SRAM_CTRL/MAIN
29 31 93.55 96.04 97.05 94.60 96.46 96.41 96.77 95.34 - 96.09 100.00
SRAM_CTRL/RET
29 31 93.55 91.28 83.86 93.56 96.43 94.44 95.36 91.17 - 82.23 66.67
SYSRST_CTRL
27 27 100.00 85.02 92.16 71.52 91.38 - 96.63 97.00 94.11 100.00 73.08
TL_AGENT
1 1 100.00 - - - - - - - - - -
UART
26 27 96.30 84.30 95.93 59.86 97.12 - 99.17 97.44 95.57 91.55 -
USBDEV
98 100 98.00 88.57 93.91 75.61 96.20 - 98.70 98.13 94.24 97.13 81.36
XBAR_MAIN
18 18 100.00 82.73 99.00 51.30 97.88 - 100.00 100.00 96.01 100.00 -
XBAR_PERI
18 18 100.00 74.29 97.84 26.96 98.08 - 100.00 100.00 91.36 100.00 -