Simulation Results: top_earlgrey_batch_sim

 
13/05/2026 15:30:31 DVSim: v1.34.0 sha: cadc156 json Branch: master
Block Tests Coverage Summary Code Coverage
Pass Total % Overall Code Functional Assertion Block Line Branch Condition Toggle FSM
ADC_CTRL
16 25 64.00 65.32 91.78 13.09 91.09 - 98.16 96.47 86.35 99.53 78.38
AES/MASKED
32 32 100.00 88.85 94.62 73.69 98.23 95.01 95.93 88.99 - 97.99 95.56
AES/UNMASKED
31 32 96.88 87.10 89.89 73.69 97.73 89.70 91.84 80.10 - 97.99 89.63
ALERT_HANDLER
23 26 88.46 89.13 91.55 77.60 98.23 - 99.77 98.42 91.54 85.74 82.26
AON_TIMER
23 23 100.00 97.01 98.81 95.54 96.67 - 99.09 98.56 99.05 98.53 -
CHIP
253 329 76.90 70.12 84.37 28.61 97.37 - 93.87 92.28 87.24 91.32 57.14
CLKMGR
26 27 96.30 92.18 97.58 84.05 94.92 - 98.19 97.91 92.61 99.19 100.00
CSRNG
17 19 89.47 88.07 92.44 78.55 93.23 97.15 97.83 92.84 - 93.37 85.71
EDN/EDN0
21 21 100.00 88.36 86.51 80.95 97.61 - 98.59 95.54 89.55 94.58 54.30
EDN/EDN1
21 21 100.00 86.41 82.95 79.41 96.88 - 98.25 93.72 91.08 87.36 44.32
ENTROPY_SRC/RNG_4BITS
22 22 100.00 74.42 88.39 52.11 82.76 94.43 97.14 86.64 - 76.02 93.75
FLASH_CTRL
78 79 98.73 95.63 94.33 95.79 96.76 - 95.98 97.10 93.82 98.36 86.39
GPIO
25 27 92.59 98.05 97.34 99.97 96.84 - 99.76 99.80 98.56 91.25 -
HMAC
28 28 100.00 78.90 96.24 43.32 97.14 - 99.12 97.85 96.01 100.00 88.24
I2C
41 50 82.00 86.56 81.45 82.03 96.19 - 96.38 92.26 84.89 89.66 44.05
KEYMGR
29 30 96.67 83.48 95.11 58.52 96.80 - 98.84 97.81 93.28 97.27 88.37
KMAC/MASKED
40 40 100.00 94.00 90.91 93.12 97.98 - 98.89 96.56 93.99 99.62 65.49
KMAC/UNMASKED
39 40 97.50 92.41 87.86 91.63 97.75 - 97.30 95.28 93.99 99.83 52.89
LC_CTRL/VOLATILE_UNLOCK_DISABLED
39 39 100.00 90.89 84.78 93.77 94.13 - 97.19 93.85 79.52 88.85 64.49
LC_CTRL/VOLATILE_UNLOCK_ENABLED
38 39 97.44 90.66 84.08 93.77 94.13 - 97.13 93.37 79.01 86.41 64.49
OTBN
37 42 88.10 93.28 94.26 96.19 89.38 99.33 99.49 91.40 - 88.59 97.56
OTP_CTRL
28 30 93.33 80.71 77.23 71.17 93.73 - 88.49 82.93 89.91 82.96 41.84
PATTGEN
16 18 88.89 95.05 98.79 89.42 96.95 100.00 100.00 100.00 - 96.37 -
PRIM_ALERT
5 5 100.00 90.76 95.47 - 86.05 - 100.00 95.83 95.83 100.00 85.71
PRIM_ESC
1 1 100.00 83.99 82.80 - 85.19 - 88.99 77.78 82.93 100.00 64.29
PRIM_LFSR
4 4 100.00 97.07 99.14 - 95.00 - 100.00 100.00 96.55 100.00 -
PRIM_PRESENT
1 1 100.00 95.88 91.76 - 100.00 - 90.41 100.00 100.00 76.63 -
PRIM_PRINCE
1 1 100.00 100.00 100.00 - 100.00 - 100.00 100.00 100.00 100.00 -
PWM
17 17 100.00 97.59 96.09 98.68 98.00 99.05 99.28 98.33 - 90.65 -
PWRMGR
25 28 89.29 95.76 94.55 96.38 96.34 - 98.92 95.61 94.20 90.02 94.00
ROM_CTRL/32KB
19 19 100.00 97.87 99.59 97.37 96.66 - 99.59 100.00 98.37 100.00 100.00
ROM_CTRL/64KB
19 19 100.00 97.23 97.99 96.90 96.80 - 99.46 99.27 98.22 99.69 93.33
RSTMGR
19 19 100.00 97.52 99.29 95.27 97.99 - 99.51 99.83 98.33 99.50 -
RSTMGR_CNSTY_CHK
0 1 0.00 - - - - - - - - - -
RV_DM/USE_JTAG_INTERFACE
52 53 98.11 78.66 87.04 53.64 95.31 - 95.83 89.67 89.12 74.89 85.71
RV_TIMER
15 19 78.95 94.16 99.79 85.88 96.82 - 100.00 100.00 99.69 99.48 -
SPI_DEVICE/1R1W
31 33 93.94 86.33 93.18 71.43 94.39 - 98.87 98.18 95.97 83.54 89.36
SPI_DEVICE/2P
33 33 100.00 88.87 94.05 77.93 94.62 - 98.91 98.28 95.95 87.74 89.36
SPI_HOST
26 26 100.00 92.12 94.93 88.24 93.18 96.96 98.76 93.35 - 87.60 100.00
SRAM_CTRL/MAIN
31 31 100.00 95.08 96.77 92.00 96.46 96.01 96.81 94.17 - 96.09 100.00
SRAM_CTRL/RET
31 31 100.00 91.73 83.36 95.40 96.43 93.80 94.97 89.51 - 82.28 66.67
SYSRST_CTRL
27 27 100.00 80.28 90.19 61.27 89.37 - 95.61 96.26 93.03 100.00 66.03
TL_AGENT
1 1 100.00 - - - - - - - - - -
UART
26 27 96.30 83.20 96.14 56.34 97.12 - 99.17 97.20 96.62 91.55 -
USBDEV
98 100 98.00 87.99 94.33 73.44 96.20 - 98.66 98.13 94.59 97.23 83.05
XBAR_MAIN
18 18 100.00 83.47 99.11 53.51 97.79 - 100.00 100.00 96.45 100.00 -
XBAR_PERI
18 18 100.00 80.09 98.77 43.46 98.05 - 100.00 100.00 95.07 100.00 -