Simulation Results: top_earlgrey_batch_sim

 
13/07/2026 15:30:34 DVSim: v1.49.12 sha: 68eb7b5 JSON Branch: master
Block Tests Coverage Summary Code Coverage
Pass Total % Overall Code Functional Assertion Block Line Branch Condition Toggle FSM
ADC_CTRL
16 25 64.00 65.90 92.87 12.92 91.90 - 98.19 96.47 86.15 99.76 83.78
AES/MASKED
28 32 87.50 88.07 94.12 71.70 98.38 94.25 95.87 87.07 - 97.99 95.56
AES/UNMASKED
29 32 90.62 87.54 90.12 74.76 97.73 90.15 92.51 81.11 - 97.99 88.89
ALERT_HANDLER
24 26 92.31 90.12 90.50 81.56 98.31 - 99.66 97.80 89.60 92.84 72.58
AON_TIMER
23 23 100.00 96.84 98.99 93.44 98.10 - 99.09 98.56 98.81 99.50 -
CHIP
243 328 74.09 73.57 84.48 38.87 97.37 - 94.47 94.26 89.25 87.26 57.14
CLKMGR
25 27 92.59 91.21 96.91 83.36 93.36 - 98.02 97.75 88.76 100.00 100.00
CSRNG
16 19 84.21 85.03 92.10 68.46 94.54 96.99 97.62 92.51 - 92.56 85.71
EDN/EDN0
20 21 95.24 84.99 80.80 79.17 95.01 - 97.17 90.24 86.42 81.79 48.39
EDN/EDN1
21 21 100.00 87.30 82.21 82.56 97.14 - 98.18 93.07 89.85 86.78 43.18
ENTROPY_SRC/RNG_4BITS
20 23 86.96 74.69 86.48 53.85 83.74 93.93 95.51 85.76 - 76.12 88.54
FLASH_CTRL
79 79 100.00 95.67 94.32 95.76 96.94 - 95.96 97.21 94.03 98.01 86.39
GPIO
24 27 88.89 96.95 92.74 100.00 98.10 - 98.93 99.01 97.98 75.04 -
HMAC
28 28 100.00 79.16 97.76 42.57 97.16 - 99.69 99.01 95.96 100.00 94.12
I2C
41 50 82.00 85.43 77.85 81.18 97.25 - 96.32 92.12 85.01 72.95 42.86
KEYMGR
29 30 96.67 82.52 94.72 55.35 97.49 - 98.72 97.53 93.20 95.77 88.37
KMAC/MASKED
30 40 75.00 81.20 69.52 77.32 96.77 - 96.16 91.05 84.81 29.39 46.20
KMAC/UNMASKED
31 40 77.50 78.78 65.88 73.96 96.50 - 92.84 87.20 81.92 27.30 40.15
LC_CTRL/VOLATILE_UNLOCK_DISABLED
39 39 100.00 90.98 84.29 93.95 94.69 - 97.20 93.85 79.43 87.40 63.55
LC_CTRL/VOLATILE_UNLOCK_ENABLED
38 39 97.44 90.60 83.38 93.59 94.83 - 97.04 93.08 78.92 84.29 63.55
OTBN
39 42 92.86 89.14 85.35 94.49 87.58 99.23 99.42 94.45 - 84.16 63.38
OTP_CTRL
27 30 90.00 79.36 75.60 67.90 94.57 - 88.47 83.07 89.74 70.89 45.83
PRIM_ALERT
5 5 100.00 90.76 95.47 - 86.05 - 100.00 95.83 95.83 100.00 85.71
PRIM_ESC
1 1 100.00 85.36 85.53 - 85.19 - 90.83 80.00 85.37 100.00 71.43
PRIM_LFSR
4 4 100.00 97.07 99.14 - 95.00 - 100.00 100.00 96.55 100.00 -
PRIM_PRESENT
1 1 100.00 95.88 91.76 - 100.00 - 90.41 100.00 100.00 76.63 -
PRIM_PRINCE
1 1 100.00 100.00 100.00 - 100.00 - 100.00 100.00 100.00 100.00 -
PWRMGR
26 29 89.66 97.31 95.63 97.86 98.43 - 99.09 96.18 95.90 90.96 96.00
ROM_CTRL/32KB
18 19 94.74 96.76 96.82 96.66 96.81 - 99.33 99.27 97.47 94.71 93.33
ROM_CTRL/64KB
18 19 94.74 96.97 95.61 97.61 97.68 - 99.33 98.91 97.62 95.54 86.67
RSTMGR
19 19 100.00 98.68 99.26 98.26 98.53 - 99.51 99.83 98.54 99.16 -
RSTMGR_CNSTY_CHK
0 1 0.00 - - - - - - - - - -
RV_DM/USE_JTAG_INTERFACE
51 53 96.23 77.54 85.73 51.11 95.79 - 95.15 88.33 87.92 74.12 83.12
RV_TIMER
16 19 84.21 93.31 94.16 87.35 98.41 - 100.00 100.00 100.00 76.63 -
SPI_DEVICE/1R1W
31 33 93.94 85.43 90.70 70.19 95.40 - 98.86 98.14 96.09 71.04 89.36
SPI_HOST
26 26 100.00 91.40 91.30 87.82 95.09 96.96 98.76 93.35 - 73.07 100.00
SRAM_CTRL/MAIN
28 31 90.32 95.33 95.69 92.20 98.10 95.97 96.75 94.01 - 91.98 100.00
SRAM_CTRL/RET
28 31 90.32 91.19 82.35 93.96 97.26 93.76 94.91 89.51 - 78.31 66.67
SYSRST_CTRL
27 27 100.00 81.87 93.12 57.57 94.92 - 97.69 97.70 95.48 99.09 75.64
TL_AGENT
1 1 100.00 - - - - - - - - - -
UART
25 27 92.59 82.09 95.15 53.99 97.12 - 98.86 96.50 93.93 91.32 -
USBDEV
98 100 98.00 88.17 93.77 73.80 96.93 - 98.64 98.13 93.72 95.32 83.05
XBAR_MAIN
18 18 100.00 91.05 99.15 75.72 98.27 - 100.00 100.00 96.60 100.00 -
XBAR_PERI
18 18 100.00 77.97 99.13 36.19 98.60 - 100.00 100.00 96.51 100.00 -