Simulation Results: top_earlgrey_batch_sim

 
21/04/2026 00:01:59 DVSim: v1.32.0 sha: 089baca json Branch: master
Block Tests Coverage Summary Code Coverage
Pass Total % Overall Code Functional Assertion Block Line Branch Condition Toggle FSM
ADC_CTRL
15 25 60.00 65.38 92.17 13.04 90.92 - 97.97 96.35 85.94 99.53 81.08
AES/MASKED
34 35 97.14 86.73 95.24 66.67 98.29 95.91 97.63 89.80 - 98.05 95.48
AES/UNMASKED
34 35 97.14 86.06 91.60 68.83 97.75 91.31 93.52 84.12 - 97.99 90.78
ALERT_HANDLER
25 26 96.15 90.73 93.83 80.02 98.33 - 99.77 98.19 91.67 94.02 85.48
AON_TIMER
23 23 100.00 95.50 98.75 91.08 96.67 - 99.09 98.56 98.81 98.53 -
CHIP
253 328 77.13 74.48 85.06 41.01 97.37 - 94.17 93.54 89.16 91.30 57.14
CLKMGR
26 27 96.30 93.27 98.17 86.45 95.20 - 98.97 98.57 94.11 99.19 100.00
CSRNG
18 19 94.74 88.24 92.20 79.72 92.79 96.91 97.62 92.25 - 93.24 85.71
EDN/EDN0
21 21 100.00 88.00 86.63 81.94 95.44 - 98.32 94.28 88.80 93.16 58.60
EDN/EDN1
20 21 95.24 84.90 83.39 74.16 97.14 - 97.95 92.86 87.08 95.89 43.18
ENTROPY_SRC/RNG_4BITS
20 22 90.91 74.47 87.11 52.72 83.58 94.46 97.19 86.35 - 76.38 88.54
FLASH_CTRL
79 79 100.00 95.61 94.59 95.57 96.67 - 96.07 97.21 93.80 98.09 87.76
GPIO
26 27 96.30 98.20 97.78 100.00 96.84 - 99.76 99.80 98.27 93.27 -
HMAC
28 28 100.00 79.45 98.40 43.26 96.70 - 99.74 99.17 96.01 100.00 97.06
I2C
42 50 84.00 86.06 81.53 80.23 96.41 - 96.41 92.41 85.34 89.45 44.05
KEYMGR
29 30 96.67 85.56 95.68 63.29 97.72 - 98.84 97.81 93.88 97.17 90.70
KMAC/MASKED
39 40 97.50 93.85 90.16 93.41 97.98 - 98.80 96.04 91.59 99.59 64.79
KMAC/UNMASKED
40 40 100.00 93.25 89.20 92.64 97.90 - 97.27 95.52 94.55 99.96 58.68
LC_CTRL/VOLATILE_UNLOCK_DISABLED
39 39 100.00 91.07 85.02 94.48 93.72 - 97.17 93.82 79.17 88.58 66.36
LC_CTRL/VOLATILE_UNLOCK_ENABLED
38 39 97.44 90.58 83.85 93.77 94.13 - 97.10 93.47 79.42 83.86 65.42
OTBN
41 42 97.62 94.25 95.36 97.88 89.50 99.37 99.56 92.22 - 92.20 97.44
OTP_CTRL
26 30 86.67 81.66 78.67 72.40 93.92 - 88.68 83.36 90.24 86.26 44.79
PATTGEN
17 18 94.44 94.98 98.87 89.42 96.65 100.00 100.00 100.00 - 96.61 -
PRIM_ALERT
4 5 80.00 90.76 95.47 - 86.05 - 100.00 95.83 95.83 100.00 85.71
PRIM_ESC
1 1 100.00 82.83 80.48 - 85.19 - 88.07 75.56 78.05 100.00 60.71
PRIM_LFSR
4 4 100.00 97.07 99.14 - 95.00 - 100.00 100.00 96.55 100.00 -
PRIM_PRESENT
1 1 100.00 95.88 91.76 - 100.00 - 90.41 100.00 100.00 76.63 -
PRIM_PRINCE
1 1 100.00 100.00 100.00 - 100.00 - 100.00 100.00 100.00 100.00 -
PWM
17 17 100.00 97.56 95.99 98.68 98.00 98.78 99.28 97.82 - 90.87 -
PWRMGR
26 28 92.86 96.04 94.58 97.20 96.34 - 98.92 95.61 94.34 90.02 94.00
ROM_CTRL/32KB
19 19 100.00 97.24 97.79 97.14 96.80 - 99.46 98.91 97.47 99.80 93.33
ROM_CTRL/64KB
19 19 100.00 97.45 99.14 96.42 96.80 - 99.59 99.27 97.62 99.21 100.00
RSTMGR
19 19 100.00 98.29 99.25 97.76 97.86 - 99.51 99.83 98.40 99.25 -
RSTMGR_CNSTY_CHK
1 1 100.00 97.18 94.36 - 100.00 - 98.41 98.31 82.76 100.00 92.31
RV_DM/USE_JTAG_INTERFACE
48 53 90.57 78.74 82.92 58.06 95.23 - 94.14 85.86 84.05 70.01 80.52
RV_TIMER
16 19 84.21 97.37 100.00 95.29 96.82 - 100.00 100.00 100.00 100.00 -
SPI_DEVICE/1R1W
31 33 93.94 87.02 92.75 73.66 94.64 - 99.03 98.23 95.73 83.54 87.23
SPI_DEVICE/2P
33 33 100.00 84.26 94.07 64.09 94.62 - 99.07 98.30 95.90 87.74 89.36
SPI_HOST
26 26 100.00 92.13 94.88 87.39 94.13 96.78 98.54 92.95 - 88.02 100.00
SRAM_CTRL/MAIN
31 31 100.00 94.56 96.48 91.00 96.19 95.74 96.36 93.52 - 96.04 100.00
SRAM_CTRL/RET
30 31 96.77 91.21 83.01 94.20 96.43 93.32 94.37 88.73 - 82.28 66.67
SYSRST_CTRL
27 27 100.00 82.79 90.42 70.51 87.45 - 95.85 96.44 93.16 100.00 66.67
TL_AGENT
1 1 100.00 - - - - - - - - - -
UART
26 27 96.30 81.74 95.99 52.11 97.12 - 99.17 96.97 96.27 91.55 -
USBDEV
98 100 98.00 88.05 94.59 73.35 96.20 - 98.70 98.17 94.09 97.23 84.75
XBAR_MAIN
18 18 100.00 87.42 99.03 65.20 98.04 - 100.00 100.00 96.10 100.00 -
XBAR_PERI
18 18 100.00 74.77 98.12 27.60 98.59 - 100.00 100.00 92.49 100.00 -