Simulation Results: top_earlgrey_batch_sim

 
04/05/2026 15:30:28 DVSim: v1.33.1 sha: e056f5d json Branch: master
Block Tests Coverage Summary Code Coverage
Pass Total % Overall Code Functional Assertion Block Line Branch Condition Toggle FSM
ADC_CTRL
15 25 60.00 65.78 93.31 13.12 90.92 - 98.03 96.29 85.98 99.76 86.49
AES/MASKED
30 35 85.71 87.00 95.11 67.59 98.29 95.72 97.41 89.48 - 98.05 95.48
AES/UNMASKED
31 35 88.57 83.86 91.69 62.15 97.75 91.93 94.06 85.46 - 97.90 89.36
ALERT_HANDLER
26 26 100.00 89.97 92.16 79.33 98.42 - 99.73 97.88 91.65 92.53 79.03
AON_TIMER
23 23 100.00 96.39 98.81 93.70 96.67 - 99.09 98.56 99.05 98.53 -
CHIP
253 328 77.13 74.39 84.44 41.37 97.37 - 93.90 92.20 87.72 91.25 57.14
CLKMGR
27 27 100.00 92.89 98.37 85.25 95.06 - 99.18 98.94 93.90 99.84 100.00
CSRNG
17 19 89.47 86.22 92.21 73.86 92.58 96.88 97.58 92.17 - 93.37 85.71
EDN/EDN0
21 21 100.00 84.50 78.52 79.96 95.01 - 97.07 89.68 84.45 73.54 47.85
EDN/EDN1
21 21 100.00 87.24 82.44 82.14 97.14 - 97.88 92.42 90.31 87.29 44.32
ENTROPY_SRC/RNG_4BITS
21 22 95.45 74.24 86.72 52.75 83.25 94.42 97.16 86.24 - 75.99 87.50
FLASH_CTRL
78 79 98.73 95.70 94.21 96.13 96.76 - 95.99 97.19 93.32 97.49 87.07
GPIO
25 27 92.59 98.27 97.97 99.99 96.84 - 99.76 99.80 98.56 93.77 -
HMAC
28 28 100.00 79.04 97.37 43.05 96.70 - 99.69 99.50 96.46 100.00 91.18
I2C
41 50 82.00 85.44 81.06 79.49 95.77 - 96.35 92.05 84.40 89.66 42.86
KEYMGR
30 30 100.00 84.85 93.61 63.92 97.03 - 98.52 97.17 94.28 96.66 81.40
KMAC/MASKED
39 40 97.50 93.99 89.58 94.41 97.98 - 98.54 95.59 91.31 99.78 62.68
KMAC/UNMASKED
40 40 100.00 93.48 89.91 92.64 97.90 - 97.49 95.68 94.55 99.87 61.98
LC_CTRL/VOLATILE_UNLOCK_DISABLED
39 39 100.00 90.63 84.52 93.24 94.13 - 97.17 93.97 79.17 88.72 63.55
LC_CTRL/VOLATILE_UNLOCK_ENABLED
38 39 97.44 90.17 84.31 92.35 93.85 - 97.06 93.47 79.14 88.31 63.55
OTBN
40 42 95.24 94.31 95.58 97.46 89.88 99.42 99.59 92.63 - 92.66 97.44
OTP_CTRL
26 30 86.67 82.00 78.32 73.57 94.11 - 88.70 83.36 89.99 86.65 42.88
PATTGEN
15 18 83.33 95.08 98.87 89.42 96.95 100.00 100.00 100.00 - 96.61 -
PRIM_ALERT
5 5 100.00 90.76 95.47 - 86.05 - 100.00 95.83 95.83 100.00 85.71
PRIM_ESC
1 1 100.00 86.48 87.76 - 85.19 - 92.66 82.22 85.37 100.00 78.57
PRIM_LFSR
4 4 100.00 97.07 99.14 - 95.00 - 100.00 100.00 96.55 100.00 -
PRIM_PRESENT
1 1 100.00 95.88 91.76 - 100.00 - 90.41 100.00 100.00 76.63 -
PRIM_PRINCE
1 1 100.00 100.00 100.00 - 100.00 - 100.00 100.00 100.00 100.00 -
PWM
17 17 100.00 97.58 96.05 98.68 98.00 98.91 99.21 98.08 - 90.87 -
PWRMGR
26 28 92.86 95.57 94.49 95.88 96.34 - 98.92 95.61 93.92 90.02 94.00
ROM_CTRL/32KB
18 19 94.74 95.42 93.27 96.18 96.80 - 99.32 98.91 95.84 98.93 73.33
ROM_CTRL/64KB
19 19 100.00 97.21 97.70 97.14 96.80 - 99.46 98.54 97.18 100.00 93.33
RSTMGR
19 19 100.00 98.54 99.24 98.51 97.86 - 99.51 99.83 98.12 99.50 -
RSTMGR_CNSTY_CHK
1 1 100.00 97.52 95.05 - 100.00 - 98.41 98.31 86.21 100.00 92.31
RV_DM/USE_JTAG_INTERFACE
51 53 96.23 78.48 85.86 54.27 95.31 - 95.26 88.62 87.93 74.37 83.12
RV_TIMER
16 19 84.21 97.47 100.00 95.59 96.82 - 100.00 100.00 100.00 100.00 -
SPI_DEVICE/1R1W
31 33 93.94 84.90 93.15 66.91 94.64 - 99.01 98.21 95.62 83.54 89.36
SPI_DEVICE/2P
33 33 100.00 84.00 94.14 63.24 94.62 - 99.10 98.32 96.18 87.74 89.36
SPI_HOST
26 26 100.00 92.89 94.78 88.24 95.64 96.74 98.27 92.85 - 88.02 100.00
SRAM_CTRL/MAIN
31 31 100.00 95.92 96.57 95.00 96.19 95.81 96.51 93.68 - 96.09 100.00
SRAM_CTRL/RET
30 31 96.77 91.42 82.78 95.20 96.29 93.05 94.06 88.11 - 82.28 66.67
SYSRST_CTRL
26 27 96.30 80.93 91.48 60.59 90.71 - 96.45 96.81 93.65 100.00 70.51
TL_AGENT
1 1 100.00 - - - - - - - - - -
UART
25 27 92.59 81.65 95.14 52.68 97.12 - 99.17 97.20 92.65 91.55 -
USBDEV
98 100 98.00 87.83 94.49 72.80 96.20 - 98.70 98.17 94.02 96.81 84.75
XBAR_MAIN
18 18 100.00 82.31 99.12 50.13 97.69 - 100.00 100.00 96.50 100.00 -
XBAR_PERI
18 18 100.00 72.90 98.77 22.12 97.81 - 100.00 100.00 95.07 100.00 -