Simulation Results: top_earlgrey_batch_sim

 
07/04/2026 19:25:09 DVSim: v1.17.3 sha: f66d746 json Branch: master
Block Tests Coverage Summary Code Coverage
Pass Total % Overall Code Functional Assertion Block Line Branch Condition Toggle FSM
ADC_CTRL
24 25 96.00 70.27 96.85 18.49 95.46 - 99.05 97.71 92.89 100.00 94.59
AES/MASKED
33 35 94.29 87.44 95.08 68.81 98.43 95.68 97.44 89.34 - 98.05 95.48
AES/UNMASKED
32 35 91.43 85.89 91.25 68.67 97.75 90.69 93.05 83.17 - 97.99 90.78
ALERT_HANDLER
25 26 96.15 90.42 92.69 80.34 98.23 - 99.68 98.33 92.13 94.30 79.03
AON_TIMER
23 23 100.00 96.04 98.81 92.65 96.67 - 99.09 98.56 99.05 98.53 -
CHIP
263 326 80.67 77.91 84.67 51.56 97.50 - 93.99 92.31 88.60 91.31 57.14
CLKMGR
26 27 96.30 93.43 98.42 86.11 95.76 - 99.11 98.84 94.94 99.19 100.00
CSRNG
17 19 89.47 83.07 91.95 64.26 93.01 96.58 97.30 91.41 - 93.37 85.71
EDN/EDN0
21 21 100.00 84.07 79.48 78.37 94.36 - 96.79 88.42 83.40 77.20 51.61
EDN/EDN1
20 21 95.24 86.40 82.45 79.62 97.14 - 98.33 93.72 88.54 87.36 44.32
ENTROPY_SRC/RNG_4BITS
22 22 100.00 74.34 89.02 50.57 83.42 94.86 97.52 87.29 - 75.45 95.83
FLASH_CTRL
79 79 100.00 95.47 94.13 95.79 96.50 - 95.99 97.16 93.76 98.01 85.71
GPIO
25 27 92.59 97.39 97.22 100.00 94.94 - 99.76 99.80 98.41 90.91 -
HMAC
28 28 100.00 79.63 97.45 44.07 97.36 - 99.74 99.67 96.68 100.00 91.18
I2C
43 50 86.00 85.60 80.89 79.92 95.98 - 95.95 91.63 84.93 89.66 42.26
KEYMGR
30 30 100.00 86.01 96.33 63.97 97.72 - 98.92 97.99 94.40 97.31 93.02
KMAC/MASKED
40 40 100.00 94.48 90.89 94.56 97.98 - 98.89 96.69 93.49 99.89 65.49
KMAC/UNMASKED
39 40 97.50 91.86 88.51 89.32 97.75 - 96.91 94.30 93.55 99.96 57.85
LC_CTRL/VOLATILE_UNLOCK_DISABLED
39 39 100.00 90.16 83.82 92.53 94.13 - 97.08 93.67 78.95 87.72 61.68
LC_CTRL/VOLATILE_UNLOCK_ENABLED
39 39 100.00 89.62 84.21 90.93 93.72 - 97.06 93.92 79.14 88.32 62.62
OTBN
39 42 92.86 93.54 95.26 95.76 89.60 99.38 99.57 92.30 - 91.74 97.44
OTP_CTRL
27 30 90.00 81.11 77.82 71.53 93.99 - 88.65 83.22 90.27 83.54 43.40
PATTGEN
16 18 88.89 95.08 98.87 89.42 96.95 100.00 100.00 100.00 - 96.61 -
PRIM_ALERT
5 5 100.00 91.33 96.61 - 86.05 - 100.00 95.83 97.92 100.00 89.29
PRIM_ESC
1 1 100.00 84.69 84.18 - 85.19 - 89.91 77.78 85.37 100.00 67.86
PRIM_LFSR
4 4 100.00 97.07 99.14 - 95.00 - 100.00 100.00 96.55 100.00 -
PRIM_PRESENT
1 1 100.00 95.88 91.76 - 100.00 - 90.41 100.00 100.00 76.63 -
PRIM_PRINCE
1 1 100.00 100.00 100.00 - 100.00 - 100.00 100.00 100.00 100.00 -
PWM
16 17 94.12 97.50 96.14 98.35 98.00 99.02 99.28 98.27 - 90.87 -
PWRMGR
24 28 85.71 95.52 94.66 96.87 95.04 - 98.92 95.61 94.77 90.02 94.00
ROM_CTRL/32KB
19 19 100.00 97.26 98.22 96.90 96.65 - 99.59 100.00 98.22 99.97 93.33
ROM_CTRL/64KB
19 19 100.00 97.28 97.90 97.14 96.80 - 99.46 99.27 98.22 99.24 93.33
RSTMGR
19 19 100.00 97.94 99.31 96.52 97.99 - 99.51 99.83 98.75 99.16 -
RSTMGR_CNSTY_CHK
0 1 0.00 - - - - - - - - - -
RV_DM/USE_JTAG_INTERFACE
46 53 86.79 72.37 82.39 39.48 95.23 - 93.77 85.34 84.05 72.19 76.62
RV_TIMER
16 19 84.21 97.18 100.00 94.71 96.82 - 100.00 100.00 100.00 100.00 -
SPI_DEVICE/1R1W
31 33 93.94 84.16 93.06 64.78 94.64 - 99.04 98.20 95.35 83.36 89.36
SPI_DEVICE/2P
33 33 100.00 86.62 93.65 71.58 94.62 - 99.09 98.33 95.87 87.74 87.23
SPI_HOST
26 26 100.00 92.61 95.03 88.66 94.13 96.96 98.76 93.35 - 88.02 100.00
SRAM_CTRL/MAIN
30 31 96.77 95.04 93.46 95.73 95.92 - 98.74 96.97 91.72 89.38 90.48
SRAM_CTRL/RET
30 31 96.77 95.76 95.57 96.10 95.61 - 99.13 97.86 91.49 89.35 100.00
SYSRST_CTRL
27 27 100.00 81.61 90.40 65.65 88.79 - 95.92 96.48 92.93 100.00 66.67
TL_AGENT
1 1 100.00 - - - - - - - - - -
UART
25 27 92.59 82.58 95.04 55.59 97.12 - 98.86 96.50 93.47 91.32 -
USBDEV
98 100 98.00 88.23 94.96 73.53 96.20 - 98.70 98.17 94.27 97.23 86.44
XBAR_MAIN
18 18 100.00 85.78 99.03 60.27 98.04 - 100.00 100.00 96.10 100.00 -
XBAR_PERI
18 18 100.00 76.44 97.92 32.86 98.55 - 100.00 100.00 91.67 100.00 -